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authorrkanabar <ronak.kanabar@intel.com>2019-11-28 10:41:45 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-12-10 11:18:48 +0000
commit263f129a8e1d012c53733170acaf9d0a01886b10 (patch)
tree7ab47619106e38f29a88bffeceded5860cf09424 /src/mainboard/intel/minnow3
parent200d213d1bae614fcd35913c1d46fec7e495717f (diff)
downloadcoreboot-263f129a8e1d012c53733170acaf9d0a01886b10.tar.xz
soc/intel/common: Add Jasperlake Device IDs
Add Jasperlake SA and PCH IDs Change-Id: I2c9ec1ee4236184b986d99250f263172c80f7117 Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37434 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <lean.sheng.tan@intel.com> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: V Sowmya <v.sowmya@intel.com>
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