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authorMartin Roth <martinroth@google.com>2015-12-02 16:20:53 -0700
committerMartin Roth <martinroth@google.com>2015-12-06 18:42:03 +0100
commitcf752fe9666919e5c403a9dac09a70cbaf64fa1f (patch)
tree33896c2d2eb8484acee85124351a6608995a0a7f /src/mainboard/intel/minnowmax
parent242ee89f983bf304cca95e15860f7e294fd1e9a6 (diff)
downloadcoreboot-cf752fe9666919e5c403a9dac09a70cbaf64fa1f.tar.xz
fsp_baytrail: Change A, A, A, A IRQ routing to A, A, A, B
Devices that have their interrupt routing set to A, A, A, A don't get any interrupt values assigned because that series evaluates to 0. The code that sets the interrupt values checks to make sure a value is set by verifying that it's not 0. On Bay Trail, these are all single-function graphics devices, so by changing one of the unused interrupt lines from A to any other value, it assigns the values correctly. This issue did not affect ACPI interrupt routing. This is just a workaround, and the root issue still needs to be fixed. Change-Id: I78866e3e0079435037e457a4fb04979254b56ee2 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12629 Tested-by: build bot (Jenkins) Reviewed-by: Ben Gardner <gardner.ben@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/minnowmax')
-rw-r--r--src/mainboard/intel/minnowmax/irqroute.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/intel/minnowmax/irqroute.h b/src/mainboard/intel/minnowmax/irqroute.h
index f8660693e5..0b577bcc40 100644
--- a/src/mainboard/intel/minnowmax/irqroute.h
+++ b/src/mainboard/intel/minnowmax/irqroute.h
@@ -45,8 +45,9 @@
#define PCIE_BRIDGE_IRQ_ROUTES \
PCIE_BRIDGE_DEV(RP, BRIDGE1_DEV, E, F, G, H)
+/* Devices set as A, A, A, A evaluate as 0, and don't get set */
#define PCI_DEV_PIRQ_ROUTES \
- PCI_DEV_PIRQ_ROUTE(GFX_DEV, A, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(GFX_DEV, A, A, A, B), \
PCI_DEV_PIRQ_ROUTE(EMMC_DEV, D, E, F, G), \
PCI_DEV_PIRQ_ROUTE(SDIO_DEV, B, A, A, A), \
PCI_DEV_PIRQ_ROUTE(SD_DEV, C, A, A, A), \