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author | Peter Stuge <peter@stuge.se> | 2010-10-01 09:13:18 +0000 |
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committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-01 09:13:18 +0000 |
commit | e4bc0f648067606841e5b24ed0bfe4d921838aec (patch) | |
tree | f6ee2e3ea9c6064ef31d9ebc072ba53fa4480bd5 /src/mainboard/intel/mtarvon/romstage.c | |
parent | c2d0bfb4705b4fe3eb9332df00f01903f55d3521 (diff) | |
download | coreboot-e4bc0f648067606841e5b24ed0bfe4d921838aec.tar.xz |
Split NORTHBRIDGE_INTEL_I945 into more precise _I945GC and _I945GM
Both chipsets use the src/northbridge/intel/i945 code but that code
needs to know which chipset is actually used. Having separate
NORTHBRIDGE_ options allows the I945GC/I945GM choice to be removed
since code can test the NORTHBRIDGE_ option directly.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5893 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/mtarvon/romstage.c')
0 files changed, 0 insertions, 0 deletions