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authorUwe Hermann <uwe@hermann-uwe.de>2010-11-21 11:36:03 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-21 11:36:03 +0000
commit6dc92f0d1a4b6a79c2db800c5bd071daa75a9a23 (patch)
tree1b06518d371222763417675b38161d261bd42f93 /src/mainboard/intel/mtarvon
parent86a571797d9ede9d79edcfdce38f50a80b9a49f9 (diff)
downloadcoreboot-6dc92f0d1a4b6a79c2db800c5bd071daa75a9a23.tar.xz
Use DIMM0 et al in lots more places instead of hardocding values.
The (0xa << 3) expression equals 0x50, i.e. DIMM0. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6103 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/mtarvon')
-rw-r--r--src/mainboard/intel/mtarvon/romstage.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c
index f36e4a4e68..5d34058a84 100644
--- a/src/mainboard/intel/mtarvon/romstage.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
@@ -36,6 +36,7 @@
#include "superio/intel/i3100/i3100_early_serial.c"
#include "northbridge/intel/i3100/memory_initialized.c"
#include "cpu/x86/bist.h"
+#include <spd.h>
#define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0)
#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
@@ -64,8 +65,8 @@ void main(unsigned long bist)
.f1 = PCI_DEV(0, 0x00, 1),
.f2 = PCI_DEV(0, 0x00, 2),
.f3 = PCI_DEV(0, 0x00, 3),
- .channel0 = { (0xa<<3)|3, (0xa<<3)|2, (0xa<<3)|1, (0xa<<3)|0 },
- .channel1 = { (0xa<<3)|7, (0xa<<3)|6, (0xa<<3)|5, (0xa<<3)|4 },
+ .channel0 = { DIMM3, DIMM2, DIMM1, DIMM0 },
+ .channel1 = { DIMM7, DIMM6, DIMM5, DIMM4 },
}
};