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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-12-29 11:32:27 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-04-28 07:59:13 +0200
commitb85a87b7d6f9f12d5c71c32741c8af731ed6be7e (patch)
tree67553a9c683557ead346dc1c7b155d3eac475090 /src/mainboard/intel/mtarvon
parent189f3ba974df8f1b305cfa421a151fe069fc1a6f (diff)
downloadcoreboot-b85a87b7d6f9f12d5c71c32741c8af731ed6be7e.tar.xz
intel SMI handlers: Refactor GPI SMI/SCI routing
Move the GPI interrupt routing selection between SMI/SCI from mainboards to southbridge. There is speculation if this is all just legacy APM stuff that could be removed with a followup. Change-Id: Iab14cf347584513793f417febc47f0559e17f5a5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Signed-off-by: Nicolas Reinecke <nr@das-labor.org> Reviewed-on: http://review.coreboot.org/7967 Tested-by: build bot (Jenkins) Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
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