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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-03-20 08:51:57 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-04-28 08:01:46 +0200 |
commit | e993ec7948d874d81c984323b5b00389420a4e65 (patch) | |
tree | 46a75016a72513728bfa53f16deade9e26020169 /src/mainboard/intel/mtarvon | |
parent | b85a87b7d6f9f12d5c71c32741c8af731ed6be7e (diff) | |
download | coreboot-e993ec7948d874d81c984323b5b00389420a4e65.tar.xz |
OxPCIe: Fix UART base addresses
The offset of 0x2000 was for a configuration with two separate OxPCIe
chips. The setup we support is a single chip with 8 UART pors.
Change-Id: If4be046a14464af7b90b86aca5464c6b3400dffc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8780
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/intel/mtarvon')
0 files changed, 0 insertions, 0 deletions