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| author | Sugnan Prabhu S <sugnan.prabhu.s@intel.com> | 2021-03-18 22:08:22 +0530 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-04-22 15:59:25 +0000 |
| commit | 50f8b4ebdd7db8077b87ab7686637599c9d93af3 (patch) | |
| tree | e0ba2ff31243e54108ee8c0a44c27d7abf59447e /src/mainboard/intel/shadowmountain | |
| parent | c1c1ba5582fa0302476491c46f18cc73b69c88ac (diff) | |
| download | coreboot-50f8b4ebdd7db8077b87ab7686637599c9d93af3.tar.xz | |
soc/intel/alderlake: Add enum for HDA audio configuration
This change adds an enum to configure the audio related UPDs used for
configuring the audio over HDMI/DP and rename a variable for better
readability.
TEST=On shadowmountain audio sound cards are detected and listed by the
Linux kernel. Audio playback and capture is working fine.
Change-Id: I2834d6f4ce1651a609c5563af375f6e365d931fa
Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51658
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/intel/shadowmountain')
| -rw-r--r-- | src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb index b06e540b84..f96844cd46 100644 --- a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb @@ -111,12 +111,9 @@ chip soc/intel/alderlake # HD Audio register "PchHdaDspEnable" = "1" - # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T - register "PchHdaIDispLinkTmode" = "3" - # iDisp-Link Freq 4: 96MHz, 3: 48MHz. - register "PchHdaIDispLinkFrequency" = "4" - # Not disconnected/enumerable - register "PchHdaIDispCodecDisconnect" = "0" + register "PchHdaIDispLinkTmode" = "HDA_TMODE_8T" + register "PchHdaIDispLinkFrequency" = "HDA_LINKFREQ_96MHZ" + register "PchHdaIDispCodecEnable" = "1" # DP port register "DdiPortAConfig" = "1" # eDP |