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| author | Hannah Williams <hannah.williams@intel.com> | 2016-01-17 23:11:25 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-01-28 20:39:46 +0100 |
| commit | 79445c72b2a338581f72f1bbe0f5897b38855a5f (patch) | |
| tree | ab638a9109d0f63c9b6727c56981c508c875e008 /src/mainboard/intel/strago/devicetree.cb | |
| parent | 89a6685edea6b583f4a9da5bd53f818428c1cadf (diff) | |
| download | coreboot-79445c72b2a338581f72f1bbe0f5897b38855a5f.tar.xz | |
Strago: Disable SD Card Detect Simulation in FSP
CQ-DEPEND=CL:12742
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Change-Id: I6c39ffebe407a4ef8555b2f050a96d33709dc624
Reviewed-on: https://review.coreboot.org/13035
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/intel/strago/devicetree.cb')
| -rwxr-xr-x | src/mainboard/intel/strago/devicetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/intel/strago/devicetree.cb b/src/mainboard/intel/strago/devicetree.cb index 2bca939dfa..ba8968c14c 100755 --- a/src/mainboard/intel/strago/devicetree.cb +++ b/src/mainboard/intel/strago/devicetree.cb @@ -70,6 +70,7 @@ chip soc/intel/braswell register "PMIC_I2CBus" = "0" register "ISPEnable" = "0" # Disable IUNIT register "ISPPciDevConfig" = "3" + register "PcdSdDetectChk" = "0" # Disable SD card detect # LPE audio codec settings register "lpe_codec_clk_src" = "LPE_CLK_SRC_XTAL" # 19.2MHz clock |