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author | Hannah Williams <hannah.williams@intel.com> | 2015-05-13 21:48:52 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-01-28 20:35:59 +0100 |
commit | 26f64069d26fd23a30d85c3128ce748ebdff5fcd (patch) | |
tree | 6840ce7d4e7350d74f47696bdb209e4014a3a49e /src/mainboard/intel/strago/gpio.c | |
parent | c68163811680caf998e85a5005065183aa1a80a7 (diff) | |
download | coreboot-26f64069d26fd23a30d85c3128ce748ebdff5fcd.tar.xz |
soc/braswell: Configure Boot Flash Write Protect status GPIO
Set up the GPIO(MF_ISH_GPIO_4) to read WP status.
TEST=Use crossystem to read the WP status
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Change-Id: I17cbcba013e2a11c2527731df985aa1243065eff
Original-Reviewed-on: https://chromium-review.googlesource.com/302424
Original-Tested-by: John Zhao <john.zhao@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Hannah Williams <hannah.williams@intel.com>
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/13185
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/intel/strago/gpio.c')
-rwxr-xr-x | src/mainboard/intel/strago/gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/strago/gpio.c b/src/mainboard/intel/strago/gpio.c index 47588fc17e..2157c8d880 100755 --- a/src/mainboard/intel/strago/gpio.c +++ b/src/mainboard/intel/strago/gpio.c @@ -242,7 +242,7 @@ static const struct soc_gpio_map gpe_gpio_map[] = { GPIO_NC, /* 19 MF_GPIO_5 */ GPIO_NC, /* 20 MF_GPIO_9 */ GPIO_NC, /* 21 MF_GPIO_0 */ - GPIO_NC, /* 22 MF_GPIO_4 */ + GPIO_INPUT_PU_20K, /* 22 MF_GPIO_4 */ GPIO_NC, /* 23 MF_GPIO_8 */ GPIO_NC, /* 24 MF_GPIO_2 */ GPIO_NC, /* 25 MF_GPIO_6 */ |