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authorElyes HAOUAS <ehaouas@noos.fr>2018-10-17 10:56:26 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-10-23 15:52:09 +0000
commita342f3937e7ce159fd170ab8cd26ba799a3bc9e4 (patch)
tree4bd4540ba11286f465272c1fbee62dbf5f9789f8 /src/mainboard/intel/strago/gpio.c
parent9856892297ad997f586a1b4dd0a494f3764a0ce2 (diff)
downloadcoreboot-a342f3937e7ce159fd170ab8cd26ba799a3bc9e4.tar.xz
src: Remove unneeded whitespace
Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29161 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/strago/gpio.c')
-rw-r--r--src/mainboard/intel/strago/gpio.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/intel/strago/gpio.c b/src/mainboard/intel/strago/gpio.c
index fa24594ee0..ed9ae4b4d1 100644
--- a/src/mainboard/intel/strago/gpio.c
+++ b/src/mainboard/intel/strago/gpio.c
@@ -69,7 +69,7 @@ static const struct soc_gpio_map gpse_gpio_map[] = {
GPIO_NC, /* 69 MMC1_RCLK */
Native_M1, /* 75 GPO USB_OC1_B */
Native_M1, /* 76 PMU_RESETBUTTON_B */
- GPI(trig_edge_both, L0, NA, non_maskable, en_edge_detect, NA , NA),
+ GPI(trig_edge_both, L0, NA, non_maskable, en_edge_detect, NA, NA),
/* GPIO_ALERT 77 */
Native_M1, /* 78 SDMMC3_PWR_EN_B */
GPIO_NC, /* 79 GPI ILB_SERIRQ */
@@ -131,11 +131,11 @@ static const struct soc_gpio_map gpsw_gpio_map[] = {
GPIO_OUT_HIGH, /* 75 SATA_GP0 */
GPIO_NC,
/* 76 GPI SATA_GP1 */
- GPIO_INPUT_PU_20K, /* 77 SATA_LEDN , EC_IN_RW */
+ GPIO_INPUT_PU_20K, /* 77 SATA_LEDN, EC_IN_RW */
GPIO_NC, /* 80 SATA_GP3 */
- Native_M1, /* 81 NFC_DEV_WAKE , MF_SMB_CLK */
+ Native_M1, /* 81 NFC_DEV_WAKE, MF_SMB_CLK */
GPIO_INPUT_NO_PULL, /* 80 SATA_GP3,RAMID0 */
- Native_M1, /* 81 NFC_DEV_WAKE , MF_SMB_CLK */
+ Native_M1, /* 81 NFC_DEV_WAKE, MF_SMB_CLK */
Native_M1, /* 82 NFC_FW_DOWNLOAD, MF_SMB_DATA */
/* Per DE request, change PCIE_CLKREQ0123B to GPIO_INPUT */
Native_M1, /* 90 PCIE_CLKREQ0B */
@@ -162,7 +162,7 @@ static const struct soc_gpio_map gpn_gpio_map[] = {
GPIO_NC, /* 06 GPIO_DFX8 */
GPIO_NC, /* 07 GPIO_DFX2 */
GPIO_NC, /* 08 GPIO_DFX6 */
- GPI(trig_edge_low, L8, NA, non_maskable, en_edge_rx_data ,
+ GPI(trig_edge_low, L8, NA, non_maskable, en_edge_rx_data,
UNMASK_WAKE, SCI), /* 15 GPIO_SUS0 */
GPO_FUNC(NA, NA), /* 16 SEC_GPIO_SUS10 */
GPI(trig_edge_low, L0, P_1K_H, non_maskable, NA, NA, NA),