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authorWonkyu Kim <wonkyu.kim@intel.com>2020-01-24 17:31:51 -0800
committerPatrick Georgi <pgeorgi@google.com>2020-01-29 10:27:30 +0000
commit03b20350e39c46b141a2f033332b459ab2d4e3d6 (patch)
treed3dca0a743a7ad8d6e5df3bd4d84bf4b0181b4e8 /src/mainboard/intel/tglrvp
parente0cd2eb6d3d4bb01cfffa7833cc720362e955350 (diff)
downloadcoreboot-03b20350e39c46b141a2f033332b459ab2d4e3d6.tar.xz
mb/intel/tglrvp: pin mux for image clocks
pin mux for IMGCLKOUT_0 and IMGCLKOUT_1 BUG=none BRANCH=none TEST=Build and boot to OS and check pinctl driver to check pin mux for Image clocks pins(GPP_D4, GPP_H20) Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com> Change-Id: Ifb0c2b17dd481ef6c19bdf9ee84f47ef08d7b9a1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38563 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/intel/tglrvp')
-rw-r--r--src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c
index 69bb931611..d1dc4ca251 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c
@@ -28,6 +28,10 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPO(GPP_C15, 0, PLTRST),
PAD_CFG_GPO(GPP_R6, 0, PLTRST),
PAD_CFG_GPO(GPP_H12, 0, PLTRST),
+
+ /* Image clock: IMGCLKOUT_0, IMGCLKOUT_1 */
+ PAD_CFG_NF(GPP_D4, NONE, PLTRST, NF1),
+ PAD_CFG_NF(GPP_H20, NONE, PLTRST, NF1),
};
/* Early pad configuration in bootblock */