diff options
author | Stefan Reinauer <stepan@openbios.org> | 2005-12-03 23:48:17 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2005-12-03 23:48:17 +0000 |
commit | bbbfd9d1906cb2d99385eae845a13a311f77ef78 (patch) | |
tree | 0485f8ebc4bdd026e0e43bdaa36a0ac0c4fd5c6a /src/mainboard/intel/xe7501devkit/bus.h | |
parent | bd25fe979bee6a2912b671b7f811192c51c5f95f (diff) | |
download | coreboot-bbbfd9d1906cb2d99385eae845a13a311f77ef78.tar.xz |
smaller fixups here and there, allowing some motherboards to compile or
to fail later than before.
dos2unix'ed the xe7501devkit files, that might have caused some problems
before.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/xe7501devkit/bus.h')
-rw-r--r-- | src/mainboard/intel/xe7501devkit/bus.h | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/src/mainboard/intel/xe7501devkit/bus.h b/src/mainboard/intel/xe7501devkit/bus.h index 0a99bb2808..84661ddb36 100644 --- a/src/mainboard/intel/xe7501devkit/bus.h +++ b/src/mainboard/intel/xe7501devkit/bus.h @@ -1,17 +1,17 @@ -#ifndef XE7501DEVKIT_BUS_H_INCLUDED
-#define XE7501DEVKIT_BUS_H_INCLUDED
-
-// These were determined by seeing how LinuxBIOS enumerates the various
-// PCI (and PCI-like) buses on the board.
-
-#define PCI_BUS_CHIPSET 0
-#define PCI_BUS_E7501_HI_B 1 // P64H2#2
-#define PCI_BUS_P64H2_2_B 2 // P64H2#2 bus B
-#define PCI_BUS_P64H2_2_A 3 // P64H2#2 bus A
-#define PCI_BUS_E7501_HI_D 4 // P64H2#1
-#define PCI_BUS_P64H2_1_B 5 // P64H2#1 bus B
-#define PCI_BUS_P64H2_1_A 6 // P64H2#1 bus A
-#define PCI_BUS_ICH3 7 // ICH3-S
-#define SUPERIO_BUS 8 // (arbitrary but unique bus #)
-
-#endif // XE7501DEVKIT_BUS_H_INCLUDED
+#ifndef XE7501DEVKIT_BUS_H_INCLUDED +#define XE7501DEVKIT_BUS_H_INCLUDED + +// These were determined by seeing how LinuxBIOS enumerates the various +// PCI (and PCI-like) buses on the board. + +#define PCI_BUS_CHIPSET 0 +#define PCI_BUS_E7501_HI_B 1 // P64H2#2 +#define PCI_BUS_P64H2_2_B 2 // P64H2#2 bus B +#define PCI_BUS_P64H2_2_A 3 // P64H2#2 bus A +#define PCI_BUS_E7501_HI_D 4 // P64H2#1 +#define PCI_BUS_P64H2_1_B 5 // P64H2#1 bus B +#define PCI_BUS_P64H2_1_A 6 // P64H2#1 bus A +#define PCI_BUS_ICH3 7 // ICH3-S +#define SUPERIO_BUS 8 // (arbitrary but unique bus #) + +#endif // XE7501DEVKIT_BUS_H_INCLUDED |