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authorSteven J. Magnani <steve@digidescorp.com>2005-09-14 13:49:04 +0000
committerSteven J. Magnani <steve@digidescorp.com>2005-09-14 13:49:04 +0000
commit0b1a5a4a920a59092b4c6d1d634e00786681a2b8 (patch)
treedb55111fa035c065062b37fbeaa6d02cdb9feffb /src/mainboard/intel/xe7501devkit/cmos.layout
parentffc83041b7d2600210e581f6ad897e9c14a60afa (diff)
downloadcoreboot-0b1a5a4a920a59092b4c6d1d634e00786681a2b8.tar.xz
Initial support for Intel XE7501DEVKIT.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2030 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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diff --git a/src/mainboard/intel/xe7501devkit/cmos.layout b/src/mainboard/intel/xe7501devkit/cmos.layout
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+# NOTE: This file must be in UNIX format (not DOS) or build_opt_tbl fails:
+# "Error - Name is an invalid identifier in line"
+
+entries
+
+#start-bit length config config-ID name
+0 512 r 0 reserved_memory1 # We know nothing about the factory BIOS
+512 512 r 0 reserved_memory2 # More factory BIOS
+
+# Work in progress.
+# This is where we would put the LB RTC_BOOT_BYTE options once the code
+# supports finding them there.
+#1024 1 e 4 boot_option
+#1025 1 e 4 last_boot
+#1026 1 e 1 ECC_memory
+#1028 4 r 0 reboot_bits
+
+# Options used by XE7501DevKit
+#1032 3 e 5 baud_rate
+#1035 1 e 2 hyper_threading
+#1036 1 e 1 power_on_after_fail
+#1037 1 e 1 nmi
+
+#1040 4 e 6 debug_level
+
+#1048 16 h 0 check_sum
+
+
+
+enumerations
+
+#ID value text
+1 0 Disable
+1 1 Enable
+2 0 Enable
+2 1 Disable
+4 0 Fallback
+4 1 Normal
+5 0 115200
+5 1 57600
+5 2 38400
+5 3 19200
+5 4 9600
+5 5 4800
+5 6 2400
+5 7 1200
+6 6 Notice
+6 7 Info
+6 8 Debug
+6 9 Spew
+
+checksums
+
+# Checksum FROM bit-location TO bit-location STORE AT bit-location
+#checksum 1024 1047 1048