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authorStefan Reinauer <stefan.reinauer@coreboot.org>2014-12-17 02:46:24 +0100
committerStefan Reinauer <stefan.reinauer@coreboot.org>2014-12-18 02:11:06 +0100
commit5878bbd935c8cbd7c6d25ef72a5460f3262119e7 (patch)
tree5a8500e6c3d5afbbdf2e54e51f9ef46ad3a4d6d0 /src/mainboard/intel/xe7501devkit/devicetree.cb
parent61ed48c9233e0d74ef5c6847052662d075553691 (diff)
downloadcoreboot-5878bbd935c8cbd7c6d25ef72a5460f3262119e7.tar.xz
Drop Intel E7520 and E7525 and related boards
There is no Cache As Ram for these boards, let's get rid of them. Also drop unused dependencies Change-Id: I94782da521c32ade7891ada29d3013cbab32a48b Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/7836 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard/intel/xe7501devkit/devicetree.cb')
-rw-r--r--src/mainboard/intel/xe7501devkit/devicetree.cb73
1 files changed, 0 insertions, 73 deletions
diff --git a/src/mainboard/intel/xe7501devkit/devicetree.cb b/src/mainboard/intel/xe7501devkit/devicetree.cb
deleted file mode 100644
index 215ed97e56..0000000000
--- a/src/mainboard/intel/xe7501devkit/devicetree.cb
+++ /dev/null
@@ -1,73 +0,0 @@
-chip northbridge/intel/e7501
- device domain 0 on
- subsystemid 0x8086 0x2480 inherit
- device pci 0.0 on end # Chipset host controller
- device pci 0.1 on end # Host RASUM controller
- device pci 2.0 on # Hub interface B
- chip southbridge/intel/i82870 # P64H2
- device pci 1c.0 on end # IOAPIC - bus B
- device pci 1d.0 on end # Hub to PCI-B bridge
- device pci 1e.0 on end # IOAPIC - bus A
- device pci 1f.0 on end # Hub to PCI-A bridge
- end
- end
- device pci 3.0 off end # Hub interface C (82808AA connector - disable for now)
- device pci 4.0 on # Hub interface D
- chip southbridge/intel/i82870 # P64H2
- device pci 1c.0 on end # IOAPIC - bus B
- device pci 1d.0 on end # Hub to PCI-B bridge
- device pci 1e.0 on end # IOAPIC - bus A
- device pci 1f.0 on end # Hub to PCI-A bridge
- end
- end
- device pci 6.0 on end # E7501 Power management registers? (undocumented)
- chip southbridge/intel/i82801cx
- device pci 1d.0 off end # USB (might not work, Southbridge code needs looking at)
- device pci 1d.1 off end # USB (not populated)
- device pci 1d.2 off end # USB (not populated)
- device pci 1e.0 on # Hub to PCI bridge
- device pci 0.0 on end
- end
- device pci 1f.0 on # LPC bridge
- chip superio/smsc/lpc47b272
- device pnp 2e.0 off # Floppy
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 2e.3 off # Parallel Port
- io 0x60 = 0x378
- irq 0x70 = 7
- end
- device pnp 2e.4 on # Com1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.5 off # Com2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.7 on # Keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1 # Keyboard interrupt
- irq 0x72 = 12 # Mouse interrupt
- end
- device pnp 2e.a off end # ACPI
- end
- end
- device pci 1f.1 on end # IDE
- device pci 1f.3 on end # SMBus
- device pci 1f.5 off end # AC97 Audio
- device pci 1f.6 off end # AC97 Modem
- end # SB
- end # PCI domain
- device cpu_cluster 0 on
- chip cpu/intel/socket_mPGA604
- device lapic 0 on end
- end
- chip cpu/intel/socket_mPGA604
- device lapic 6 on end
- end
- end
-end