diff options
| author | Stefan Reinauer <stepan@openbios.org> | 2005-12-03 23:48:17 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2005-12-03 23:48:17 +0000 |
| commit | bbbfd9d1906cb2d99385eae845a13a311f77ef78 (patch) | |
| tree | 0485f8ebc4bdd026e0e43bdaa36a0ac0c4fd5c6a /src/mainboard/intel/xe7501devkit/ioapic.h | |
| parent | bd25fe979bee6a2912b671b7f811192c51c5f95f (diff) | |
| download | coreboot-bbbfd9d1906cb2d99385eae845a13a311f77ef78.tar.xz | |
smaller fixups here and there, allowing some motherboards to compile or
to fail later than before.
dos2unix'ed the xe7501devkit files, that might have caused some problems
before.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/xe7501devkit/ioapic.h')
| -rw-r--r-- | src/mainboard/intel/xe7501devkit/ioapic.h | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/src/mainboard/intel/xe7501devkit/ioapic.h b/src/mainboard/intel/xe7501devkit/ioapic.h index 6db3d949f6..642c04519f 100644 --- a/src/mainboard/intel/xe7501devkit/ioapic.h +++ b/src/mainboard/intel/xe7501devkit/ioapic.h @@ -1,11 +1,11 @@ -// IOAPIC addresses determined by LinuxBIOS enumeration.
-// Someday add functions to get APIC IDs and versions from the chips themselves.
-
-#define IOAPIC_ICH3 2
-#define IOAPIC_P64H2_2_BUS_B 3 // IOAPIC 3 at 01:1c.0 MBAR = fe300000 DataAddr = fe300010
-#define IOAPIC_P64H2_2_BUS_A 4 // IOAPIC 4 at 01:1e.0 MBAR = fe301000 DataAddr = fe301010
-#define IOAPIC_P64H2_1_BUS_B 5 // IOAPIC 5 at 04:1c.0 MBAR = fe500000 DataAddr = fe500010
-#define IOAPIC_P64H2_1_BUS_A 8 // IOAPIC 8 at 04:1e.0 MBAR = fe501000 DataAddr = fe501010
-
-#define P64H2_IOAPIC_VERSION 0x20
-#define INTEL_IOAPIC_NUM_INTERRUPTS 24 // Both ICH-3 and P64-H2
+// IOAPIC addresses determined by LinuxBIOS enumeration. +// Someday add functions to get APIC IDs and versions from the chips themselves. + +#define IOAPIC_ICH3 2 +#define IOAPIC_P64H2_2_BUS_B 3 // IOAPIC 3 at 01:1c.0 MBAR = fe300000 DataAddr = fe300010 +#define IOAPIC_P64H2_2_BUS_A 4 // IOAPIC 4 at 01:1e.0 MBAR = fe301000 DataAddr = fe301010 +#define IOAPIC_P64H2_1_BUS_B 5 // IOAPIC 5 at 04:1c.0 MBAR = fe500000 DataAddr = fe500010 +#define IOAPIC_P64H2_1_BUS_A 8 // IOAPIC 8 at 04:1e.0 MBAR = fe501000 DataAddr = fe501010 + +#define P64H2_IOAPIC_VERSION 0x20 +#define INTEL_IOAPIC_NUM_INTERRUPTS 24 // Both ICH-3 and P64-H2 |