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| author | Steven J. Magnani <steve@digidescorp.com> | 2005-09-14 13:49:04 +0000 |
|---|---|---|
| committer | Steven J. Magnani <steve@digidescorp.com> | 2005-09-14 13:49:04 +0000 |
| commit | 0b1a5a4a920a59092b4c6d1d634e00786681a2b8 (patch) | |
| tree | db55111fa035c065062b37fbeaa6d02cdb9feffb /src/mainboard/intel/xe7501devkit/ioapic.h | |
| parent | ffc83041b7d2600210e581f6ad897e9c14a60afa (diff) | |
| download | coreboot-0b1a5a4a920a59092b4c6d1d634e00786681a2b8.tar.xz | |
Initial support for Intel XE7501DEVKIT.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2030 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/xe7501devkit/ioapic.h')
| -rw-r--r-- | src/mainboard/intel/xe7501devkit/ioapic.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/intel/xe7501devkit/ioapic.h b/src/mainboard/intel/xe7501devkit/ioapic.h new file mode 100644 index 0000000000..6db3d949f6 --- /dev/null +++ b/src/mainboard/intel/xe7501devkit/ioapic.h @@ -0,0 +1,11 @@ +// IOAPIC addresses determined by LinuxBIOS enumeration.
+// Someday add functions to get APIC IDs and versions from the chips themselves.
+
+#define IOAPIC_ICH3 2
+#define IOAPIC_P64H2_2_BUS_B 3 // IOAPIC 3 at 01:1c.0 MBAR = fe300000 DataAddr = fe300010
+#define IOAPIC_P64H2_2_BUS_A 4 // IOAPIC 4 at 01:1e.0 MBAR = fe301000 DataAddr = fe301010
+#define IOAPIC_P64H2_1_BUS_B 5 // IOAPIC 5 at 04:1c.0 MBAR = fe500000 DataAddr = fe500010
+#define IOAPIC_P64H2_1_BUS_A 8 // IOAPIC 8 at 04:1e.0 MBAR = fe501000 DataAddr = fe501010
+
+#define P64H2_IOAPIC_VERSION 0x20
+#define INTEL_IOAPIC_NUM_INTERRUPTS 24 // Both ICH-3 and P64-H2
|