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authorStefan Reinauer <stepan@coresystems.de>2010-04-14 11:40:34 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-14 11:40:34 +0000
commit5d3dee8334c2303434d7b00bec3aad4911120ac1 (patch)
tree38fd30e2473dc76d9cd64092133127934f184e9e /src/mainboard/intel/xe7501devkit
parent4154c668f24da79672099dfac06f5263c415fee0 (diff)
downloadcoreboot-5d3dee8334c2303434d7b00bec3aad4911120ac1.tar.xz
drop quite a lot of dead code that did nothing but produce warnings and make
the rest of the code unreadable. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5426 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/xe7501devkit')
-rw-r--r--src/mainboard/intel/xe7501devkit/reset.c2
-rw-r--r--src/mainboard/intel/xe7501devkit/romstage.c26
2 files changed, 11 insertions, 17 deletions
diff --git a/src/mainboard/intel/xe7501devkit/reset.c b/src/mainboard/intel/xe7501devkit/reset.c
index 7c8a729f5e..7abc9e5318 100644
--- a/src/mainboard/intel/xe7501devkit/reset.c
+++ b/src/mainboard/intel/xe7501devkit/reset.c
@@ -1,3 +1,5 @@
+#include <reset.h>
+
void i82801cx_hard_reset(void);
void hard_reset(void)
diff --git a/src/mainboard/intel/xe7501devkit/romstage.c b/src/mainboard/intel/xe7501devkit/romstage.c
index 4c57de1d75..003a37f31c 100644
--- a/src/mainboard/intel/xe7501devkit/romstage.c
+++ b/src/mainboard/intel/xe7501devkit/romstage.c
@@ -27,11 +27,6 @@ static void hard_reset(void)
outb(0x0e, 0x0cf9);
}
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
- /* nothing to do */
-}
-
static inline int spd_read_byte(unsigned device, unsigned address)
{
return smbus_read_byte(device, address);
@@ -56,31 +51,28 @@ static void main(unsigned long bist)
if (bist == 0)
{
// Skip this if there was a built in self test failure
-
early_mtrr_init();
- enable_lapic();
- }
+ enable_lapic();
+ }
// Get the serial port running and print a welcome banner
- lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
- console_init();
+ lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ uart_init();
+ console_init();
- // Halt if there was a built in self test failure
+ // Halt if there was a built in self test failure
report_bist_failure(bist);
-// print_pci_devices();
+ // print_pci_devices();
// If this is a warm boot, some initialization can be skipped
if (!bios_reset_detected())
{
enable_smbus();
-// dump_spd_registers(&memctrl[0]);
-// dump_smbus_registers();
-
-// memreset_setup(); No-op for this chipset
+ // dump_spd_registers(&memctrl[0]);
+ // dump_smbus_registers();
sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
}