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| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2021-03-14 09:12:12 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-28 16:00:38 +0000 |
| commit | 1ea938ca5e522cf0fbf93cbc8362b1ae58ec070f (patch) | |
| tree | fa654300adb2b34c37f9e19774778718b0472d06 /src/mainboard/intel | |
| parent | d1150fd6d76e76fd1ccf8ede0ca96de0c404073c (diff) | |
| download | coreboot-1ea938ca5e522cf0fbf93cbc8362b1ae58ec070f.tar.xz | |
mb/intel/shadowwmountain: Enable CSE Lite SKU for shadowmountain
During the initial phases, the development and validation teams have to
deal with both Consumer SKU and Lite SKU firmware. Having the support for
CSE Lite enabled by default in coreboot helps in integrating both the SKUs.
With this we only have to interchange the CSE region in the full BIOS image
without having to worry about Kconfigs. Eases the build and integration
flow.
TEST=Verified build for Shadowmountain
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I2ebf4da1b8c1df2e9c43b6e3bb688a9f8db652d3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51496
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/shadowmountain/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/intel/shadowmountain/Kconfig b/src/mainboard/intel/shadowmountain/Kconfig index 2dbd653e0d..a8f7bf5d9e 100644 --- a/src/mainboard/intel/shadowmountain/Kconfig +++ b/src/mainboard/intel/shadowmountain/Kconfig @@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS select MAINBOARD_HAS_CHROMEOS select PCIEXP_HOTPLUG select SOC_INTEL_ALDERLAKE + select SOC_INTEL_CSE_LITE_SKU config CHROMEOS select GBB_FLAG_FORCE_DEV_SWITCH_ON |