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| author | Angel Pons <th3fanbus@gmail.com> | 2020-07-04 01:24:59 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-12 11:16:12 +0000 |
| commit | 8aab7876d186ed9a8e978ec06a83a46f74a6179b (patch) | |
| tree | 5069b7aa81401f9606021cc8e25f9d52192f7ea7 /src/mainboard/intel | |
| parent | 39a6093d7937dec85077f754fbcaa2e2be493eae (diff) | |
| download | coreboot-8aab7876d186ed9a8e978ec06a83a46f74a6179b.tar.xz | |
haswell: Move some MRC settings to devicetree
There's no generic way to tell whether a mainboard has an EC or not.
Making Kconfig symbols for these options seems overkill, too. So, just
put them on the devicetree. Also, drop unnecessary assignments when the
board's current value is zero, as the struct defaults to zero already.
Change-Id: If2ebac5fcab278c97dfaf8adc9d1e125888acafe
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43129
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/baskingridge/romstage.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/intel/baskingridge/romstage.c b/src/mainboard/intel/baskingridge/romstage.c index 564177553d..192751707a 100644 --- a/src/mainboard/intel/baskingridge/romstage.c +++ b/src/mainboard/intel/baskingridge/romstage.c @@ -51,8 +51,6 @@ void mb_get_spd_map(uint8_t spd_map[4]) void mainboard_fill_pei_data(struct pei_data *pei_data) { - pei_data->ec_present = 0; - struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = { /* Length, Enable, OCn#, Location */ { 0x0040, 1, 0, /* P0: Back USB3 port (OC0) */ |