diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-04-01 15:41:16 -0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-04-02 20:47:28 +0000 |
| commit | a10cc8a98bd5fd3e15a9c0efddd342cfc3c72c44 (patch) | |
| tree | 2956914b31be8d81dc14140f097da72b7a449700 /src/mainboard/intel | |
| parent | 1e36dc078e4012f884d67a32f1faac5f80406285 (diff) | |
| download | coreboot-a10cc8a98bd5fd3e15a9c0efddd342cfc3c72c44.tar.xz | |
mb/intel/adlrvp: Update VBT filenames
These files were just renamed to put `adlrvp` in between `vbt`
and the memory technology type.
Change-Id: Icefbac462d0ec9c660541e9cf44686d6dcf82dfd
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52032
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: YH Lin <yueherngl@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/adlrvp/mainboard.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/intel/adlrvp/mainboard.c b/src/mainboard/intel/adlrvp/mainboard.c index 39462040fe..0ab80d2313 100644 --- a/src/mainboard/intel/adlrvp/mainboard.c +++ b/src/mainboard/intel/adlrvp/mainboard.c @@ -46,9 +46,9 @@ const char *mainboard_vbt_filename(void) switch (sku_id) { case ADL_P_LP5_1: case ADL_P_LP5_2: - return "vbt_lp5.bin"; + return "vbt_adlrvp_lp5.bin"; case ADL_P_DDR5: - return "vbt_ddr5.bin"; + return "vbt_adlrvp_ddr5.bin"; default: return "vbt.bin"; } |