summaryrefslogtreecommitdiff
path: root/src/mainboard/intel
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2020-09-11 07:34:24 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-10-12 14:41:35 +0000
commita820caeef4bfa8d87590b85573cf30fc979db32d (patch)
tree86827908b9013298016ae2ac0b6faaf408768a9e /src/mainboard/intel
parent11e4618794e4b6f917c607b12964fadf834800f1 (diff)
downloadcoreboot-a820caeef4bfa8d87590b85573cf30fc979db32d.tar.xz
mb/intel/d945gclf/acpi: Convert platform.asl to ASL 2.0 syntax
It builds same binary for intel/d945gclf using BUILD_TIMELESS=1 Change-Id: Ic48008719a9cf6942ae8cdaebaab6ba43e665489 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45281 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/d945gclf/acpi/platform.asl4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/intel/d945gclf/acpi/platform.asl b/src/mainboard/intel/d945gclf/acpi/platform.asl
index 30e4d2c6b8..cf73fc1d6a 100644
--- a/src/mainboard/intel/d945gclf/acpi/platform.asl
+++ b/src/mainboard/intel/d945gclf/acpi/platform.asl
@@ -20,12 +20,12 @@ Method(_WAK,1)
// was inserted while a sleep state was active.
// Are we going to S3?
- If (LEqual(Arg0, 3)) {
+ If (Arg0 == 3) {
// ..
}
// Are we going to S4?
- If (LEqual(Arg0, 4)) {
+ If (Arg0 == 4) {
// ..
}