diff options
| author | Julius Werner <jwerner@chromium.org> | 2021-02-05 17:27:45 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-17 08:10:35 +0000 |
| commit | a9b44f4c79078210fe9966daf2412cc222c2d0a9 (patch) | |
| tree | 6d9ac8e9f83f247be8f43a6f7bae00786657d18c /src/mainboard/intel | |
| parent | 806deb666110d231a4800a5a1adcc932242aefa5 (diff) | |
| download | coreboot-a9b44f4c79078210fe9966daf2412cc222c2d0a9.tar.xz | |
spd_bin: Replace get_spd_cbfs_rdev() with spd_cbfs_map()
In pursuit of the goal of eliminating the proliferation of raw region
devices to represent CBFS files outside of the CBFS core code, this
patch removes the get_spd_cbfs_rdev() API and instead replaces it with
spd_cbfs_map() which will find and map the SPD file in one go and return
a pointer to the relevant section. (This makes it impossible to unmap
the mapping again, which all but one of the users didn't bother to do
anyway since the API is only used on platforms with memory-mapped
flash. Presumably this will stay that way in the future so this is not
something worth worrying about.)
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Iec7571bec809f2f0712e7a97b4c853b8b40702d1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50350
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/icelake_rvp/romstage_fsp_params.c | 11 | ||||
| -rw-r--r-- | src/mainboard/intel/kblrvp/romstage.c | 10 |
2 files changed, 8 insertions, 13 deletions
diff --git a/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c b/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c index 97617cc1b5..160f0a53ff 100644 --- a/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c +++ b/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c @@ -14,15 +14,12 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) printk(BIOS_DEBUG, "spd index is 0x%x\n", spd_index); if (spd_index > 0 && spd_index != 2) { - struct region_device spd_rdev; - - if (get_spd_cbfs_rdev(&spd_rdev, spd_index) < 0) - die("spd.bin not found\n"); - - mem_cfg->MemorySpdDataLen = region_device_sz(&spd_rdev); + mem_cfg->MemorySpdDataLen = CONFIG_DIMM_SPD_SIZE; /* Memory leak is ok since we have memory mapped boot media */ - mem_cfg->MemorySpdPtr00 = (uintptr_t)rdev_mmap_full(&spd_rdev); + mem_cfg->MemorySpdPtr00 = spd_cbfs_map(spd_index); + if (!mem_cfg->MemorySpdPtr00) + die("spd.bin not found\n"); mem_cfg->MemorySpdPtr10 = mem_cfg->MemorySpdPtr00; mem_cfg->SpdAddressTable[0] = 0x0; diff --git a/src/mainboard/intel/kblrvp/romstage.c b/src/mainboard/intel/kblrvp/romstage.c index 79206e00c8..bc4c6de661 100644 --- a/src/mainboard/intel/kblrvp/romstage.c +++ b/src/mainboard/intel/kblrvp/romstage.c @@ -28,14 +28,12 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget); if (CONFIG(BOARD_INTEL_KBLRVP3)) { - struct region_device spd_rdev; - mem_cfg->DqPinsInterleaved = 0; - if (get_spd_cbfs_rdev(&spd_rdev, spd_index) < 0) - die("spd.bin not found\n"); - mem_cfg->MemorySpdDataLen = region_device_sz(&spd_rdev); + mem_cfg->MemorySpdDataLen = CONFIG_DIMM_SPD_SIZE; /* Memory leak is ok since we have memory mapped boot media */ - mem_cfg->MemorySpdPtr00 = (uintptr_t)rdev_mmap_full(&spd_rdev); + mem_cfg->MemorySpdPtr00 = spd_cbfs_map(spd_index); + if (!mem_cfg->MemorySpdPtr00) + die("spd.bin not found\n"); } else { /* CONFIG_BOARD_INTEL_KBLRVP7 and CONFIG_BOARD_INTEL_KBLRVP8 */ struct spd_block blk = { .addr_map = { 0x50, 0x51, 0x52, 0x53, }, |