summaryrefslogtreecommitdiff
path: root/src/mainboard/intel
diff options
context:
space:
mode:
authorUwe Hermann <uwe@hermann-uwe.de>2010-12-08 08:22:04 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-12-08 08:22:04 +0000
commitd35192544675575276482e5ce65d1b6a6fd9e4a0 (patch)
tree6bf1a6e9cd6989ddf2e70ffa8cde40b8239369c4 /src/mainboard/intel
parent8301d8348a0848d56fdf4dbd76acd6bdcd3fc944 (diff)
downloadcoreboot-d35192544675575276482e5ce65d1b6a6fd9e4a0.tar.xz
Move "select CACHE_AS_RAM" lines from boards into CPU socket.
All K8/Fam10h boards use CAR, so move the "select CACHE_AS_RAM" into the socket directories, and remove it from the individual boards. Do the same for Intel CPUs/sockets where all boards use CAR. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/mtarvon/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/intel/mtarvon/Kconfig b/src/mainboard/intel/mtarvon/Kconfig
index 9ed066c883..76dec5eb37 100644
--- a/src/mainboard/intel/mtarvon/Kconfig
+++ b/src/mainboard/intel/mtarvon/Kconfig
@@ -7,7 +7,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select NORTHBRIDGE_INTEL_I3100
select SOUTHBRIDGE_INTEL_I3100
select SUPERIO_INTEL_I3100
- select CACHE_AS_RAM
select HAVE_HARD_RESET
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE