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authorSubrata Banik <subrata.banik@intel.com>2021-03-22 20:08:22 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-03-26 04:53:18 +0000
commitefe858b1706568fcfefe4d582cebbb32de9cd596 (patch)
tree67963fec45832f4804693f263a5263ef962f5df2 /src/mainboard/intel
parentc8ac8f5ce969196f9e38e24629120ab8c5a4c873 (diff)
downloadcoreboot-efe858b1706568fcfefe4d582cebbb32de9cd596.tar.xz
soc/intel/alderlake: Add provision to override Rcomp settings
Add function to allow overriding the RcompResistor and RcompTarget UPDs from mainboard if required. Mainboard users can pass required rcomp from memory.c file. Refactor ddr_config structure to take out rcomp related variable outside for all memory type to override if required. BUG=b:182772421 TEST=Able to override the default RcompResistor and RcompTarget values. Change-Id: Ie8528bbf0517728534d47f9adaabfc9a2c469609 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51683 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/adlrvp/memory.c29
1 files changed, 16 insertions, 13 deletions
diff --git a/src/mainboard/intel/adlrvp/memory.c b/src/mainboard/intel/adlrvp/memory.c
index 68f7fca483..85d174363e 100644
--- a/src/mainboard/intel/adlrvp/memory.c
+++ b/src/mainboard/intel/adlrvp/memory.c
@@ -8,18 +8,19 @@
static const struct mb_cfg ddr4_mem_config = {
.type = MEM_TYPE_DDR4,
+ .rcomp = {
+ /* Baseboard uses only 100ohm Rcomp resistor */
+ .resistor = 100,
+
+ /* Baseboard Rcomp target values */
+ .targets = {40, 30, 33, 33, 30},
+ },
+
.ect = true, /* Early Command Training */
.UserBd = BOARD_TYPE_MOBILE,
.ddr_config = {
-
- /* Baseboard uses only 100ohm Rcomp resistor */
- .rcomp_resistor = 100,
-
- /* Baseboard Rcomp target values */
- .rcomp_targets = {40, 30, 33, 33, 30},
-
.dq_pins_interleaved = false,
},
};
@@ -143,17 +144,19 @@ static const struct mb_cfg lp5_mem_config = {
static const struct mb_cfg ddr5_mem_config = {
.type = MEM_TYPE_DDR5,
+ .rcomp = {
+ /* Baseboard uses only 100ohm Rcomp resistor */
+ .resistor = 100,
+
+ /* Baseboard Rcomp target values */
+ .targets = {50, 30, 30, 30, 27},
+ },
+
.ect = true, /* Early Command Training */
.UserBd = BOARD_TYPE_MOBILE,
.ddr_config = {
- /* Baseboard uses only 100ohm Rcomp resistor */
- .rcomp_resistor = 100,
-
- /* Baseboard Rcomp target values */
- .rcomp_targets = {50, 30, 30, 30, 27},
-
.dq_pins_interleaved = false,
}
};