summaryrefslogtreecommitdiff
path: root/src/mainboard/intel
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-14 23:47:33 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-21 10:48:18 +0000
commitf6940886f9aa9133c0fa4e1599c257b1a67be376 (patch)
treea2e76669897a4240e4e5a4ea97c9c75f23690217 /src/mainboard/intel
parent5a38572fd99b7a9e86170efddc14960a7f37a748 (diff)
downloadcoreboot-f6940886f9aa9133c0fa4e1599c257b1a67be376.tar.xz
mb/*/chromeos.c: Be explicit about code for ramstage
Motivation is to reduce use of !__PRE_RAM__, it does not mean ENV_RAMSTAGE but we also exclude ENV_SMM with the change. Change-Id: I1f96bb8c055a3da63274e1ab7f7d4bc70867cbf1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31930 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/baskingridge/chromeos.c2
-rw-r--r--src/mainboard/intel/emeraldlake2/chromeos.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/intel/baskingridge/chromeos.c b/src/mainboard/intel/baskingridge/chromeos.c
index 69e1050101..1c62e5e0eb 100644
--- a/src/mainboard/intel/baskingridge/chromeos.c
+++ b/src/mainboard/intel/baskingridge/chromeos.c
@@ -23,7 +23,7 @@
#include <southbridge/intel/common/gpio.h>
#include <vendorcode/google/chromeos/chromeos.h>
-#ifndef __PRE_RAM__
+#if ENV_RAMSTAGE
#include <boot/coreboot_tables.h>
#define GPIO_COUNT 6
diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c
index 24f887598f..8c0aeea4d1 100644
--- a/src/mainboard/intel/emeraldlake2/chromeos.c
+++ b/src/mainboard/intel/emeraldlake2/chromeos.c
@@ -23,7 +23,7 @@
#include <southbridge/intel/common/gpio.h>
#include <vendorcode/google/chromeos/chromeos.h>
-#ifndef __PRE_RAM__
+#if ENV_RAMSTAGE
#include <boot/coreboot_tables.h>
#define GPIO_COUNT 6