Kconfig!

Works on Kontron, qemu, and serengeti. 

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>

tested on abuild only. 

Acked-by: Ronald G. Minnich <rminnich@gmail.com>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

5 files changed, 240 insertions, 0 deletions

diff --git a/src/mainboard/intel/Kconfig b/src/mainboard/intel/Kconfig
new file mode 100644
index 0000000000..792d600548
--- /dev/null
+++ b/src/mainboard/intel/Kconfig
@@ -0,0 +1 @@
+#
diff --git a/src/mainboard/intel/jarrell/devicetree.cb b/src/mainboard/intel/jarrell/devicetree.cb
new file mode 100644
index 0000000000..e4cdbdeacb
--- /dev/null
+++ b/src/mainboard/intel/jarrell/devicetree.cb
@@ -0,0 +1,79 @@
+chip northbridge/intel/e7520
+	device pci_domain 0 on 
+		device pci 00.0 on end
+		device pci 00.1 on end
+		device pci 01.0 on end
+		device pci 02.0 on 
+			chip southbridge/intel/pxhd # pxhd1
+				device pci 00.0 on end
+				device pci 00.1 on end
+				device pci 00.2 on
+					chip drivers/generic/generic
+						device pci 04.0 on end
+						device pci 04.1 on end
+					end
+				end
+				device pci 00.3 on end
+			end
+		end
+		device pci 06.0 on end
+		chip southbridge/intel/i82801er # i82801er
+			device pci 1d.0 on end
+			device pci 1d.1 on end
+			device pci 1d.2 on end
+			device pci 1d.3 off end
+			device pci 1d.7 on end
+			device pci 1e.0 on
+				chip drivers/ati/ragexl
+					device pci 0c.0 on end
+				end
+			end
+			device pci 1f.0 on 
+				chip superio/nsc/pc87427
+					device pnp 2e.0 off end
+					device pnp 2e.2 on
+#						 io 0x60 = 0x2f8
+#						irq 0x70 = 3
+						 io 0x60 = 0x3f8
+						irq 0x70 = 4
+					end
+					device pnp 2e.3 on
+#						 io 0x60 = 0x3f8
+#						irq 0x70 = 4
+						 io 0x60 = 0x2f8
+						irq 0x70 = 3
+					end
+					device pnp 2e.4 off end
+					device pnp 2e.5 off end
+					device pnp 2e.6 on
+						 io 0x60 = 0x60
+						 io 0x62 = 0x64
+						irq 0x70 = 1
+					end
+					device pnp 2e.7 off end
+					device pnp 2e.9 off end
+					device pnp 2e.a off end
+					device pnp 2e.f on end
+					device pnp 2e.10 off end
+					device pnp 2e.14 off end
+				end
+			end
+			device pci 1f.1 on end
+			device pci 1f.2 off end
+			device pci 1f.3 on end 
+			device pci 1f.5 off end
+			device pci 1f.6 off end
+			register "gpio[40]" = "ICH5R_GPIO_USE_AS_GPIO"
+			register "gpio[48]" = "ICH5R_GPIO_USE_AS_GPIO | ICH5R_GPIO_SEL_OUTPUT | ICH5R_GPIO_LVL_LOW"
+			register "gpio[41]" = "ICH5R_GPIO_USE_AS_GPIO | ICH5R_GPIO_SEL_INPUT"
+		end
+	end
+	device apic_cluster 0 on
+		chip cpu/intel/socket_mPGA604 # cpu 0
+			device apic 0 on end
+		end
+		chip cpu/intel/socket_mPGA604 # cpu 1
+			device apic 6 on end
+		end
+	end
+end
diff --git a/src/mainboard/intel/mtarvon/devicetree.cb b/src/mainboard/intel/mtarvon/devicetree.cb
new file mode 100644
index 0000000000..1a11859b09
--- /dev/null
+++ b/src/mainboard/intel/mtarvon/devicetree.cb
@@ -0,0 +1,44 @@
+chip northbridge/intel/i3100
+        device pci_domain 0 on
+                device pci 00.0 on end # IMCH
+                device pci 00.1 on end # IMCH error status
+                device pci 01.0 on end # IMCH EDMA engine
+                device pci 02.0 on end # PCIe port A/A0
+                device pci 03.0 on end # PCIe port A1
+                chip southbridge/intel/i3100
+                        # PIRQ line -> legacy IRQ mappings
+                        register "pirq_a_d" = "0x0b070a05"
+                        register "pirq_e_h" = "0x0a808080"
+
+                        device pci 1c.0 on end # PCIe port B0
+                        device pci 1c.1 on end # PCIe port B1
+                        device pci 1c.2 on end # PCIe port B2
+                        device pci 1c.3 on end # PCIe port B3
+                        device pci 1d.0 on end # USB (UHCI) 1
+                        device pci 1d.1 on end # USB (UHCI) 2
+                        device pci 1d.7 on end # USB (EHCI)
+                        device pci 1e.0 on end # PCI bridge
+                        device pci 1e.2 on end # audio
+                        device pci 1e.3 on end # modem
+                        device pci 1f.0 on     # LPC bridge
+                                chip superio/intel/i3100
+                                        device pnp 4e.4 on # Com1
+                                                 io 0x60 = 0x3f8
+                                                irq 0x70 = 4
+                                        end
+                                        device pnp 4e.5 on # Com2
+                                                 io 0x60 = 0x2f8
+                                                irq 0x70 = 3
+                                        end
+                                end
+                        end
+                        device pci 1f.2 on end # SATA
+                        device pci 1f.3 on end # SMBus
+                end
+        end
+        device apic_cluster 0 on
+                chip cpu/intel/socket_mPGA479M
+                        device apic 0 on end
+                end
+        end
+end
diff --git a/src/mainboard/intel/truxton/devicetree.cb b/src/mainboard/intel/truxton/devicetree.cb
new file mode 100644
index 0000000000..7604beafe5
--- /dev/null
+++ b/src/mainboard/intel/truxton/devicetree.cb
@@ -0,0 +1,41 @@
+chip northbridge/intel/i3100
+        device pci_domain 0 on
+                device pci 00.0 on end # IMCH
+                device pci 00.1 on end # IMCH error status
+                device pci 01.0 on end # IMCH EDMA engine
+                device pci 02.0 on end # PCIe port A/A0
+                device pci 03.0 on end # PCIe port A1
+                device pci 04.0 on end # ?
+                device pci 08.0 off end # must be off to boot
+                device pci 0d.0 off end # must be off to boot
+                device pci 0d.1 off end # must be off to boot
+                chip southbridge/intel/i3100
+                        # PIRQ line -> legacy IRQ mappings
+                        register "pirq_a_d" = "0x0b070a05"
+                        register "pirq_e_h" = "0x0a808080"
+
+                        device pci 1d.0 on end  # USB (UHCI)
+                        device pci 1d.7 on end  # USB (EHCI)
+                        device pci 1f.0 on      # LPC bridge
+                                chip superio/intel/i3100
+                                        device pnp 4e.4 on # Com1
+                                                 io 0x60 = 0x3f8
+                                                irq 0x70 = 4
+                                        end
+                                        device pnp 4e.5 on # Com2
+                                                 io 0x60 = 0x2f8
+                                                irq 0x70 = 3
+                                        end
+                                end
+                        end
+                        device pci 1f.2 on end  # SATA
+                        device pci 1f.3 on end  # SMBus
+                        device pci 1f.4 on end  # ?
+                end
+        end
+        device apic_cluster 0 on
+                chip cpu/intel/ep80579
+                        device apic 0 on end
+                end
+        end
+end
diff --git a/src/mainboard/intel/xe7501devkit/devicetree.cb b/src/mainboard/intel/xe7501devkit/devicetree.cb
new file mode 100644
index 0000000000..68d2b977eb
--- /dev/null
+++ b/src/mainboard/intel/xe7501devkit/devicetree.cb
@@ -0,0 +1,75 @@
+chip northbridge/intel/e7501
+	device pci_domain 0 on
+		device pci 0.0 on end # Chipset host controller
+		device pci 0.1 on end # Host RASUM controller
+		device pci 2.0 on # Hub interface B
+			chip southbridge/intel/i82870 # P64H2
+				device pci 1c.0 on end # IOAPIC - bus B
+				device pci 1d.0 on end # Hub to PCI-B bridge
+				device pci 1e.0 on end # IOAPIC - bus A
+				device pci 1f.0 on end # Hub to PCI-A bridge
+			end
+		end
+		device pci 3.0 off end # Hub interface C (82808AA connector - disable for now)
+		device pci 4.0 on # Hub interface D
+			chip southbridge/intel/i82870 # P64H2
+				device pci 1c.0 on end # IOAPIC - bus B
+				device pci 1d.0 on end # Hub to PCI-B bridge
+				device pci 1e.0 on end # IOAPIC - bus A
+				device pci 1f.0 on end # Hub to PCI-A bridge
+			end
+		end
+		device pci 6.0 on end # E7501 Power management registers? (undocumented)
+		chip southbridge/intel/i82801ca
+			device pci 1d.0 off end # USB (might not work, Southbridge code needs looking at)
+			device pci 1d.1 off end # USB (not populated)
+			device pci 1d.2 off end # USB (not populated)
+			device pci 1e.0 on # Hub to PCI bridge
+				chip drivers/pci/onboard # VGA ROM
+					device pci 0.0 on end
+				register "rom_address" = "_vgarom_start"
+				end
+			end
+			device pci 1f.0 on # LPC bridge
+				chip superio/smsc/lpc47b272
+					device pnp 2e.0 off # Floppy
+						io 0x60 = 0x3f0
+						irq 0x70 = 6
+						drq 0x74 = 2
+					end
+					device pnp 2e.3 off # Parallel Port
+						io 0x60 = 0x378
+						irq 0x70 = 7
+					end
+					device pnp 2e.4 on # Com1
+						io 0x60 = 0x3f8
+						irq 0x70 = 4
+					end
+					device pnp 2e.5 off # Com2
+						io 0x60 = 0x2f8
+						irq 0x70 = 3
+					end
+					device pnp 2e.7 on # Keyboard
+						io 0x60 = 0x60
+						io 0x62 = 0x64
+						irq 0x70 = 1 # Keyboard interrupt
+						irq 0x72 = 12 # Mouse interrupt
+					end
+					device pnp 2e.a off end # ACPI
+				end
+			end
+			device pci 1f.1 on end # IDE
+			device pci 1f.3 on end # SMBus
+			device pci 1f.5 off end # AC97 Audio
+			device pci 1f.6 off end # AC97 Modem
+		end # SB
+	end # PCI_DOMAIN
+	device apic_cluster 0 on
+		chip cpu/intel/socket_mPGA604
+			device apic 0 on end
+		end
+		chip cpu/intel/socket_mPGA604
+			device apic 6 on end
+		end
+	end
+end