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authorMartin Roth <martin.roth@se-eng.com>2014-12-04 20:46:55 -0700
committerMartin Roth <gaumless@gmail.com>2014-12-05 21:41:59 +0100
commit1df7064e0dabfe41fe4fd87789f24b703d07b2c8 (patch)
treed988471621f1be7d19af78730c66b3b3f52281e0 /src/mainboard/intel
parentbc78fcf99dfe573c77ea9f400bbdfe770e706f12 (diff)
downloadcoreboot-1df7064e0dabfe41fe4fd87789f24b703d07b2c8.tar.xz
minnowmax board: Update Kconfig
- The ROM chip is 8MB, not 4MB. - Default to the 2GB SKU instead of 1GB - that's what's out right now. - Set CBFS size to 3MB - that's what the firmware descriptor is set to. Change-Id: Ic77f5c1e898dca39de573623707ff5f5e5ca9682 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7649 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/minnowmax/Kconfig6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/intel/minnowmax/Kconfig b/src/mainboard/intel/minnowmax/Kconfig
index 6a65382a17..aacf17452e 100644
--- a/src/mainboard/intel/minnowmax/Kconfig
+++ b/src/mainboard/intel/minnowmax/Kconfig
@@ -23,7 +23,7 @@ if BOARD_INTEL_MINNOWMAX
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select SOC_INTEL_FSP_BAYTRAIL
- select BOARD_ROMSIZE_KB_4096
+ select BOARD_ROMSIZE_KB_8192
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
select OVERRIDE_MRC_CACHE_LOC
@@ -49,7 +49,7 @@ config MAINBOARD_PART_NUMBER
choice
prompt "Memory SKU to build"
- default MINNOWMAX_1GB_SKU
+ default MINNOWMAX_2GB_SKU
config MINNOWMAX_1GB_SKU
bool "1GB"
@@ -81,7 +81,7 @@ config MRC_CACHE_LOC_OVERRIDE
config CBFS_SIZE
hex
- default 0x00200000
+ default 0x00300000
config DRIVERS_PS2_KEYBOARD
bool