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| author | Derek Waldner <derek.waldner.os@gmail.com> | 2016-06-06 13:54:26 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-07-02 02:45:40 +0200 |
| commit | 4025e26fc585d372a39087c67b6efd4b410a89bd (patch) | |
| tree | 584f53c49a28d2eba8b4ade85db9aefba5ac0690 /src/mainboard/intel | |
| parent | d02685b053d4597c498afd9baf4f2b6dc82e00d5 (diff) | |
| download | coreboot-4025e26fc585d372a39087c67b6efd4b410a89bd.tar.xz | |
amd/olivehillplus: Fix PCIe lane number comments.
Correct the GPP PCIe lane number comments so that they match the code.
Change-Id: If27c6a55ebedb0927dd9e8c7c9a833194e129a25
Signed-off-by: Derek Waldner <derek.waldner.os@gmail.com>
Reviewed-on: https://review.coreboot.org/15095
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/intel')
0 files changed, 0 insertions, 0 deletions