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| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-03-18 20:58:41 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-03-18 20:58:41 +0000 |
| commit | 78acf932912669eb0eb7f7280da1b3c550035ebb (patch) | |
| tree | 89f13a87df362395527d41f42d0a57a167eab8db /src/mainboard/intel | |
| parent | 2bd91003413d431f0a4db6c3c6691f4b688cf5c5 (diff) | |
| download | coreboot-78acf932912669eb0eb7f7280da1b3c550035ebb.tar.xz | |
Remove remaining uses of
HAVE_FAILOVER_BOOT
HAVE_FALLBACK_BOOT
USE_FAILOVER_IMAGE
USE_FALLBACK_IMAGE
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/d945gclf/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/intel/eagleheights/romstage.c | 2 |
2 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c index bac2a0bc96..1441bb5597 100644 --- a/src/mainboard/intel/d945gclf/romstage.c +++ b/src/mainboard/intel/d945gclf/romstage.c @@ -216,9 +216,7 @@ static void early_ich7_init(void) RCBA32(0x2034) = reg32; } -#if CONFIG_USE_FALLBACK_IMAGE == 1 #include "southbridge/intel/i82801gx/cmos_failover.c" -#endif #include <cbmem.h> diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c index d928de5c56..4a04b9a091 100644 --- a/src/mainboard/intel/eagleheights/romstage.c +++ b/src/mainboard/intel/eagleheights/romstage.c @@ -121,9 +121,7 @@ static inline int spd_read_byte(u16 device, u8 address) #include "northbridge/intel/i3100/reset_test.c" #include "debug.c" -#if CONFIG_USE_FALLBACK_IMAGE == 1 #include "southbridge/intel/i3100/cmos_failover.c" -#endif void early_config(void) { device_t dev; |