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authorSridhar Siricilla <sridhar.siricilla@intel.com>2020-10-30 11:45:24 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-11-09 10:18:22 +0000
commitc046dd02322dfed1db0c25ae310ec59630d8b492 (patch)
tree213bb384c42c69b88ddc29ca8c3c297c2849f4f6 /src/mainboard/intel
parent06bff726d43b1ec46fcfe28797d8ef7f748ea9e8 (diff)
downloadcoreboot-c046dd02322dfed1db0c25ae310ec59630d8b492.tar.xz
mb/intel/adlrvp: Replace if-else-if ladder with switch construct
The patch replaces if-else-if ladder with switch case for readability purpose. Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I268db8bc63aaf64d4a91c9a44ef5282154b20a53 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47054 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/adlrvp/memory.c14
1 files changed, 9 insertions, 5 deletions
diff --git a/src/mainboard/intel/adlrvp/memory.c b/src/mainboard/intel/adlrvp/memory.c
index d51caf783a..cab4ef93f3 100644
--- a/src/mainboard/intel/adlrvp/memory.c
+++ b/src/mainboard/intel/adlrvp/memory.c
@@ -72,12 +72,16 @@ const struct mb_cfg *variant_memory_params(void)
{
int board_id = get_board_id();
- if (board_id == ADL_P_LP4_1 || board_id == ADL_P_LP4_2)
+ switch (board_id) {
+ case ADL_P_LP4_1:
+ case ADL_P_LP4_2:
return &lpddr4_mem_config;
- else if (board_id == ADL_P_DDR4_1 || board_id == ADL_P_DDR4_2)
+ case ADL_P_DDR4_1:
+ case ADL_P_DDR4_2:
return &ddr4_mem_config;
- else if (board_id == ADL_P_DDR5)
+ case ADL_P_DDR5:
return &ddr5_mem_config;
-
- die("unsupported board id : 0x%x\n", board_id);
+ default:
+ die("unsupported board id : 0x%x\n", board_id);
+ }
}