diff options
author | Uwe Hermann <uwe@hermann-uwe.de> | 2006-10-24 23:00:42 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2006-10-24 23:00:42 +0000 |
commit | d86417bfa379de85ba7a52ba626bbdfbed389438 (patch) | |
tree | 81ba50b7be89a1349a721d69ec13a8bc579aa30b /src/mainboard/intel | |
parent | f327e655ce3bb6f9569b57d7a5ab28a9eab18ca2 (diff) | |
download | coreboot-d86417bfa379de85ba7a52ba626bbdfbed389438.tar.xz |
Change all occurences of NSC to nsc in the code. The next commit
will then rename the src/superio/NSC directory to src/superio/nsc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2472 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r-- | src/mainboard/intel/jarrell/Config.lb | 2 | ||||
-rw-r--r-- | src/mainboard/intel/jarrell/auto.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/intel/jarrell/Config.lb b/src/mainboard/intel/jarrell/Config.lb index 8533409f7c..c355640cc1 100644 --- a/src/mainboard/intel/jarrell/Config.lb +++ b/src/mainboard/intel/jarrell/Config.lb @@ -163,7 +163,7 @@ chip northbridge/intel/E7520 end end device pci 1f.0 on - chip superio/NSC/pc87427 + chip superio/nsc/pc87427 device pnp 2e.0 off end device pnp 2e.2 on # io 0x60 = 0x2f8 diff --git a/src/mainboard/intel/jarrell/auto.c b/src/mainboard/intel/jarrell/auto.c index 9ff4288552..f102746636 100644 --- a/src/mainboard/intel/jarrell/auto.c +++ b/src/mainboard/intel/jarrell/auto.c @@ -12,14 +12,14 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82801er/i82801er_early_smbus.c" #include "northbridge/intel/E7520/raminit.h" -#include "superio/NSC/pc87427/pc87427.h" +#include "superio/nsc/pc87427/pc87427.h" #include "cpu/x86/lapic/boot_cpu.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "watchdog.c" #include "reset.c" #include "power_reset_check.c" #include "jarrell_fixups.c" -#include "superio/NSC/pc87427/pc87427_early_init.c" +#include "superio/nsc/pc87427/pc87427_early_init.c" #include "northbridge/intel/E7520/memory_initialized.c" #include "cpu/x86/bist.h" |