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authorArthur Heymans <arthur@aheymans.xyz>2018-06-04 19:34:59 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-06-14 10:01:35 +0000
commitfaa5f9869d67ab1a963e1c49afaaf353503586c9 (patch)
treea489e11b9225a4e93fefc42419095ce03f3eaee5 /src/mainboard/intel
parent5e2ac2c0795628ab086da76304cd97b16e1d169f (diff)
downloadcoreboot-faa5f9869d67ab1a963e1c49afaaf353503586c9.tar.xz
cpu/intel/haswell: Use the common intel romstage_main function
Tested on Google peppy (Acer C720). Change-Id: I6453c40bf4ebe4695684c1bd3a403d6def82814f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/26835 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/baskingridge/romstage.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/intel/baskingridge/romstage.c b/src/mainboard/intel/baskingridge/romstage.c
index 11e7444168..5f519150b6 100644
--- a/src/mainboard/intel/baskingridge/romstage.c
+++ b/src/mainboard/intel/baskingridge/romstage.c
@@ -17,6 +17,7 @@
#include <stdint.h>
#include <stddef.h>
#include <console/console.h>
+#include <cpu/intel/romstage.h>
#include <cpu/intel/haswell/haswell.h>
#include <northbridge/intel/haswell/haswell.h>
#include <northbridge/intel/haswell/raminit.h>