summaryrefslogtreecommitdiff
path: root/src/mainboard/intel
diff options
context:
space:
mode:
authorDivagar Mohandass <divagar.mohandass@intel.com>2015-09-29 15:01:58 +0530
committerMartin Roth <martinroth@google.com>2016-01-28 20:45:11 +0100
commit060bc7941f645c9bba27ec618591bc3f1ce89685 (patch)
treea5d35d53ed7010e20a5d5e33fa937afbbec3443b /src/mainboard/intel
parentba6dfe4cc57578cbce1e710c8477d6dda997541a (diff)
downloadcoreboot-060bc7941f645c9bba27ec618591bc3f1ce89685.tar.xz
intel/strago: Update DPTF parameters to higher temperature.
Fish bowl HTML5 graphics benchmark with 250 fish is not reaching 60 FPS. This change will update the DPTF parameters to accommodate this test. TEST=Run fish bowl benchmark with 250 fish and check for 60 FPS. Change-Id: I6b6827199cb0f5ab44c354abc477ea73e4de9ec5 Original-Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/302208 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/13484 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/intel')
-rwxr-xr-xsrc/mainboard/intel/strago/acpi/dptf.asl27
-rwxr-xr-xsrc/mainboard/intel/strago/onboard.h3
2 files changed, 11 insertions, 19 deletions
diff --git a/src/mainboard/intel/strago/acpi/dptf.asl b/src/mainboard/intel/strago/acpi/dptf.asl
index b875b93ca0..2a95703b6e 100755
--- a/src/mainboard/intel/strago/acpi/dptf.asl
+++ b/src/mainboard/intel/strago/acpi/dptf.asl
@@ -16,19 +16,19 @@
#define DPTF_TSR0_SENSOR_ID 0
#define DPTF_TSR0_SENSOR_NAME "TMP432_Internal"
-#define DPTF_TSR0_PASSIVE 48
-#define DPTF_TSR0_CRITICAL 70
+#define DPTF_TSR0_PASSIVE 49
+#define DPTF_TSR0_CRITICAL 75
#define DPTF_TSR1_SENSOR_ID 1
#define DPTF_TSR1_SENSOR_NAME "TMP432_Power_top"
-#define DPTF_TSR1_PASSIVE 60
-#define DPTF_TSR1_CRITICAL 70
+#define DPTF_TSR1_PASSIVE 65
+#define DPTF_TSR1_CRITICAL 85
#define DPTF_TSR2_SENSOR_ID 2
#define DPTF_TSR2_SENSOR_NAME "TMP432_CPU_bottom"
-#define DPTF_TSR2_PASSIVE 55
-#define DPTF_TSR2_CRITICAL 70
+#define DPTF_TSR2_PASSIVE 49
+#define DPTF_TSR2_CRITICAL 75
#define DPTF_ENABLE_CHARGER
@@ -50,18 +50,7 @@ Name (DTRT, Package () {
Package () { \_SB.PCI0.B0DB, \_SB.PCI0.B0DB, 100, 50, 0, 0, 0, 0 },
/* CPU Effect on Temp Sensor 0 */
- Package () { \_SB.PCI0.B0DB, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 },
-
-#ifdef DPTF_ENABLE_CHARGER
- /* Charger Effect on Temp Sensor 1 */
- Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 200, 600, 0, 0, 0, 0 },
-#endif
-
- /* CPU Effect on Temp Sensor 1 */
- Package () { \_SB.PCI0.B0DB, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 },
-
- /* CPU Effect on Temp Sensor 2 */
- Package () { \_SB.PCI0.B0DB, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 },
+ Package () { \_SB.PCI0.B0DB, \_SB.DPTF.TSR0, 100, 100, 0, 0, 0, 0 },
})
Name (MPPC, Package ()
@@ -69,7 +58,7 @@ Name (MPPC, Package ()
0x2, /* Revision */
Package () { /* Power Limit 1 */
0, /* PowerLimitIndex, 0 for Power Limit 1 */
- 1600, /* PowerLimitMinimum */
+ 2000, /* PowerLimitMinimum */
6200, /* PowerLimitMaximum */
1000, /* TimeWindowMinimum */
1000, /* TimeWindowMaximum */
diff --git a/src/mainboard/intel/strago/onboard.h b/src/mainboard/intel/strago/onboard.h
index 4527365f65..a6176dd52e 100755
--- a/src/mainboard/intel/strago/onboard.h
+++ b/src/mainboard/intel/strago/onboard.h
@@ -69,4 +69,7 @@
#define BCRD2_PMIC_I2C_BUS 0x01
+#define DPTF_CPU_PASSIVE 88
+#define DPTF_CPU_CRITICAL 90
+
#endif