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| author | Duncan Laurie <dlaurie@google.com> | 2018-11-07 13:56:29 -0700 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2018-11-08 18:49:51 +0000 |
| commit | 26072787e02da496f617bbc044e8f70d4282ce15 (patch) | |
| tree | 97f53c200f93455b9ee109cd57bcbbf2cf3bb13e /src/mainboard/intel | |
| parent | 488f03bca83ff0fa8892587eca70be771452b170 (diff) | |
| download | coreboot-26072787e02da496f617bbc044e8f70d4282ce15.tar.xz | |
mb/google/sarien: Set runtime IRQs to reset on PLTRST
GPIOs that use GPI_APIC setting with DEEP can cause an IRQ storm after
S3 resume. GPIOs that fire IRQs via IOAPIC need to get their logic
reset over PLTRST to prevent IRQ strom after S3 resume.
For sarien/arcada these are all runtime IRQs only, not wake capable.
Change-Id: Iec3706a3b47b54abbacd06081910f389979c330f
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/29539
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/intel')
0 files changed, 0 insertions, 0 deletions