mb/*/*: Remove BROADWELL_DE boards

Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are
now mandatory features, which this platform lacks.

Change-Id: I3d9b6bb48bfd15c0182448f774e9af1e0c944fd5
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36983
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>

15 files changed, 0 insertions, 784 deletions

diff --git a/src/mainboard/intel/camelbackmountain_fsp/Kconfig b/src/mainboard/intel/camelbackmountain_fsp/Kconfig
deleted file mode 100644
index 696fbf440c..0000000000
--- a/src/mainboard/intel/camelbackmountain_fsp/Kconfig
+++ /dev/null
@@ -1,41 +0,0 @@
-if BOARD_INTEL_CAMELBACKMOUNTAIN_FSP
-
-config BOARD_SPECIFIC_OPTIONS
-	def_bool y
-	select SOC_INTEL_FSP_BROADWELL_DE
-	select BOARD_ROMSIZE_KB_2048
-	select HAVE_ACPI_TABLES
-	select HAVE_OPTION_TABLE
-	select INTEGRATED_UART if FSP_PACKAGE_DEFAULT
-	select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT
-	select SERIRQ_CONTINUOUS_MODE
-	select MAINBOARD_USES_IFD_GBE_REGION
-
-config MAINBOARD_DIR
-	string
-	default "intel/camelbackmountain_fsp"
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "Camelback Mountain CRB"
-
-config IRQ_SLOT_COUNT
-	int
-	default 18
-
-config CBFS_SIZE
-	hex
-	default 0x00200000
-
-config VIRTUAL_ROM_SIZE
-	hex
-	default 0x1000000
-
-config DRIVERS_UART_8250IO
-	def_bool n
-
-config FSP_PACKAGE_DEFAULT
-	bool "Configure defaults for the Intel FSP package"
-	default n
-
-endif # BOARD_INTEL_CAMELBACKMOUNTAIN_FSP
diff --git a/src/mainboard/intel/camelbackmountain_fsp/Kconfig.name b/src/mainboard/intel/camelbackmountain_fsp/Kconfig.name
deleted file mode 100644
index 3cff0156de..0000000000
--- a/src/mainboard/intel/camelbackmountain_fsp/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_INTEL_CAMELBACKMOUNTAIN_FSP
-	bool "Camelback Mountain FSP-based CRB"
diff --git a/src/mainboard/intel/camelbackmountain_fsp/Makefile.inc b/src/mainboard/intel/camelbackmountain_fsp/Makefile.inc
deleted file mode 100644
index 1606476d80..0000000000
--- a/src/mainboard/intel/camelbackmountain_fsp/Makefile.inc
+++ /dev/null
@@ -1,16 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2012 Google Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-ramstage-y += irqroute.c
diff --git a/src/mainboard/intel/camelbackmountain_fsp/acpi/mainboard.asl b/src/mainboard/intel/camelbackmountain_fsp/acpi/mainboard.asl
deleted file mode 100644
index 62944ef353..0000000000
--- a/src/mainboard/intel/camelbackmountain_fsp/acpi/mainboard.asl
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-Device (PWRB)
-{
-	Name(_HID, EisaId("PNP0C0C"))
-}
diff --git a/src/mainboard/intel/camelbackmountain_fsp/acpi/platform.asl b/src/mainboard/intel/camelbackmountain_fsp/acpi/platform.asl
deleted file mode 100644
index 7ffae2e6e0..0000000000
--- a/src/mainboard/intel/camelbackmountain_fsp/acpi/platform.asl
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* The APM port can be used for generating software SMIs */
-
-OperationRegion (APMP, SystemIO, 0xb2, 2)
-Field (APMP, ByteAcc, NoLock, Preserve)
-{
-	APMC, 8,	// APM command
-	APMS, 8		// APM status
-}
-
-/* Port 80 POST */
-
-OperationRegion (POST, SystemIO, 0x80, 1)
-Field (POST, ByteAcc, Lock, Preserve)
-{
-	DBG0, 8
-}
-
-Name(\APC1, Zero) // IIO IOAPIC
-
-Name(\PICM, Zero) // IOAPIC/8259
-
-Method(_PIC, 1)
-{
-	Store(Arg0, PICM)
-}
-
-/* The _PTS method (Prepare To Sleep) is called before the OS is
- * entering a sleep state. The sleep state number is passed in Arg0
- */
-
-Method(_PTS,1)
-{
-}
-
-/* The _WAK method is called on system wakeup */
-
-Method(_WAK,1)
-{
-	Return(Package(){0,0})
-}
diff --git a/src/mainboard/intel/camelbackmountain_fsp/acpi_tables.c b/src/mainboard/intel/camelbackmountain_fsp/acpi_tables.c
deleted file mode 100644
index 3c8d2e8afc..0000000000
--- a/src/mainboard/intel/camelbackmountain_fsp/acpi_tables.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Google Inc.
- * Copyright (C) 2015-2016 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/ioapic.h>
-#include <soc/acpi.h>
-#include <soc/iomap.h>
-
-extern const unsigned char AmlCode[];
-
-unsigned long acpi_fill_madt(unsigned long current)
-{
-	u32 i;
-
-	current = acpi_create_madt_lapics(current);
-
-	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 8,
-		IOXAPIC1_BASE_ADDRESS, 0);
-	set_ioapic_id((u8 *)IOXAPIC1_BASE_ADDRESS, 8);
-
-	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 9,
-		IOXAPIC2_BASE_ADDRESS, 24);
-	set_ioapic_id((u8 *)IOXAPIC2_BASE_ADDRESS, 9);
-
-	current = acpi_madt_irq_overrides(current);
-
-	for (i = 0; i < CONFIG_MAX_CPUS; i++)
-		current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, i, 0xD, 1);
-
-	return current;
-}
diff --git a/src/mainboard/intel/camelbackmountain_fsp/board_info.txt b/src/mainboard/intel/camelbackmountain_fsp/board_info.txt
deleted file mode 100644
index 680dee8e2e..0000000000
--- a/src/mainboard/intel/camelbackmountain_fsp/board_info.txt
+++ /dev/null
@@ -1,5 +0,0 @@
-Board name: Camelback Mountain
-Category: eval
-ROM protocol: SPI
-ROM socketed: yes
-Release year: 2015
diff --git a/src/mainboard/intel/camelbackmountain_fsp/cmos.layout b/src/mainboard/intel/camelbackmountain_fsp/cmos.layout
deleted file mode 100644
index 3c5bc3b03d..0000000000
--- a/src/mainboard/intel/camelbackmountain_fsp/cmos.layout
+++ /dev/null
@@ -1,119 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2007-2008 coresystems GmbH
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-# -----------------------------------------------------------------
-entries
-
-#start-bit length  config config-ID    name
-#0            8       r       0        seconds
-#8            8       r       0        alarm_seconds
-#16           8       r       0        minutes
-#24           8       r       0        alarm_minutes
-#32           8       r       0        hours
-#40           8       r       0        alarm_hours
-#48           8       r       0        day_of_week
-#56           8       r       0        day_of_month
-#64           8       r       0        month
-#72           8       r       0        year
-# -----------------------------------------------------------------
-# Status Register A
-#80           4       r       0        rate_select
-#84           3       r       0        REF_Clock
-#87           1       r       0        UIP
-# -----------------------------------------------------------------
-# Status Register B
-#88           1       r       0        auto_switch_DST
-#89           1       r       0        24_hour_mode
-#90           1       r       0        binary_values_enable
-#91           1       r       0        square-wave_out_enable
-#92           1       r       0        update_finished_enable
-#93           1       r       0        alarm_interrupt_enable
-#94           1       r       0        periodic_interrupt_enable
-#95           1       r       0        disable_clock_updates
-# -----------------------------------------------------------------
-# Status Register C
-#96           4       r       0        status_c_rsvd
-#100          1       r       0        uf_flag
-#101          1       r       0        af_flag
-#102          1       r       0        pf_flag
-#103          1       r       0        irqf_flag
-# -----------------------------------------------------------------
-# Status Register D
-#104          7       r       0        status_d_rsvd
-#111          1       r       0        valid_cmos_ram
-# -----------------------------------------------------------------
-# Diagnostic Status Register
-#112          8       r       0        diag_rsvd1
-
-# -----------------------------------------------------------------
-0          120       r       0        reserved_memory
-#120        264       r       0        unused
-
-# -----------------------------------------------------------------
-# RTC_BOOT_BYTE (coreboot hardcoded)
-384          1       e       4        boot_option
-388          4       h       0        reboot_counter
-#390          2       r       0        unused?
-
-# -----------------------------------------------------------------
-# coreboot config options: console
-#392          3       r       0        unused
-395          4       e       6        debug_level
-#399          1       r       0        unused
-
-# coreboot config options: cpu
-400          1       e       2        hyper_threading
-#401          7       r       0        unused
-
-# coreboot config options: southbridge
-408          1       e       1        nmi
-409          2       e       7        power_on_after_fail
-#411          5       r       0        unused
-
-# MRC Scrambler Seed values
-896         32        r       0        mrc_scrambler_seed
-928         32        r       0        mrc_scrambler_seed_s3
-
-# coreboot config options: check sums
-984         16       h       0        check_sum
-#1000        24       r       0        amd_reserved
-
-# -----------------------------------------------------------------
-
-enumerations
-
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-6     0     Emergency
-6     1     Alert
-6     2     Critical
-6     3     Error
-6     4     Warning
-6     5     Notice
-6     6     Info
-6     7     Debug
-6     8     Spew
-7     0     Disable
-7     1     Enable
-7     2     Keep
-# -----------------------------------------------------------------
-checksums
-
-checksum 392 415 984
diff --git a/src/mainboard/intel/camelbackmountain_fsp/devicetree.cb b/src/mainboard/intel/camelbackmountain_fsp/devicetree.cb
deleted file mode 100644
index 30d99c22eb..0000000000
--- a/src/mainboard/intel/camelbackmountain_fsp/devicetree.cb
+++ /dev/null
@@ -1,15 +0,0 @@
-chip soc/intel/fsp_broadwell_de
-	device cpu_cluster 0 on
-		device lapic 0 on end
-	end
-	device domain 0 on
-		device pci 00.0 on end # SoC router
-		device pci 14.0 on end # xHCI Controller
-		device pci 19.0 on end # Gigabit LAN Controller
-		device pci 1d.0 on end # EHCI Controller
-		device pci 1f.0 on end # LPC Bridge
-		device pci 1f.2 on end # SATA Controller
-		device pci 1f.3 on end # SMBus Controller
-		device pci 1f.5 on end # SATA Controller
-	end
-end
diff --git a/src/mainboard/intel/camelbackmountain_fsp/dsdt.asl b/src/mainboard/intel/camelbackmountain_fsp/dsdt.asl
deleted file mode 100644
index 1248703266..0000000000
--- a/src/mainboard/intel/camelbackmountain_fsp/dsdt.asl
+++ /dev/null
@@ -1,294 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2011 Google Inc.
- * Copyright (C) 2015-2016 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/acpi.h>
-DefinitionBlock(
-	"dsdt.aml",
-	"DSDT",
-	0x02,		// DSDT revision: ACPI v2.0 and up
-	OEM_ID,
-	ACPI_TABLE_CREATOR,
-	0x20110725	// OEM revision
-)
-{
-	#include "acpi/platform.asl"
-
-	Name(_S0, Package() { 0x00, 0x00, 0x00, 0x00 })
-	Name(_S5, Package() { 0x07, 0x00, 0x00, 0x00 })
-
-	Scope (\_SB)
-	{
-		Device (PCI0)
-		{
-			#include <acpi/southcluster.asl>
-			#include <acpi/pcie1.asl>
-		}
-
-		Name (PRUN, Package() {
-			Package() { 0x0008FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0008FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0008FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0008FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0009FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0009FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0009FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0009FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x000AFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x000AFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x000AFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x000AFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x000BFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x000BFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x000BFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x000BFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x000CFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x000CFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x000CFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x000CFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x000DFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x000DFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x000DFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x000DFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x000EFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x000EFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x000EFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x000EFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x000FFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x000FFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x000FFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x000FFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0010FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0010FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0010FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0010FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0011FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0011FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0011FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0011FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0012FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0012FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0012FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0012FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0013FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0013FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0013FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0013FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0014FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0014FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0014FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0014FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0016FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0016FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0016FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0016FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0017FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0017FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0017FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0017FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0018FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0018FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0018FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0018FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0019FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0019FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0019FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0019FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x001CFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x001CFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x001CFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x001CFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x001DFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x001DFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x001DFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x001DFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x001EFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x001EFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x001EFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x001EFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x001FFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x001FFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x001FFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x001FFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-		})
-
-		Name (ARUN, Package() {
-			Package() { 0x0008FFFF, 0, 0, 16 },
-			Package() { 0x0008FFFF, 1, 0, 17 },
-			Package() { 0x0008FFFF, 2, 0, 18 },
-			Package() { 0x0008FFFF, 3, 0, 19 },
-
-			Package() { 0x0009FFFF, 0, 0, 16 },
-			Package() { 0x0009FFFF, 1, 0, 17 },
-			Package() { 0x0009FFFF, 2, 0, 18 },
-			Package() { 0x0009FFFF, 3, 0, 19 },
-
-			Package() { 0x000AFFFF, 0, 0, 16 },
-			Package() { 0x000AFFFF, 1, 0, 17 },
-			Package() { 0x000AFFFF, 2, 0, 18 },
-			Package() { 0x000AFFFF, 3, 0, 19 },
-
-			Package() { 0x000BFFFF, 0, 0, 16 },
-			Package() { 0x000BFFFF, 1, 0, 17 },
-			Package() { 0x000BFFFF, 2, 0, 18 },
-			Package() { 0x000BFFFF, 3, 0, 19 },
-
-			Package() { 0x000CFFFF, 0, 0, 16 },
-			Package() { 0x000CFFFF, 1, 0, 17 },
-			Package() { 0x000CFFFF, 2, 0, 18 },
-			Package() { 0x000CFFFF, 3, 0, 19 },
-
-			Package() { 0x000DFFFF, 0, 0, 16 },
-			Package() { 0x000DFFFF, 1, 0, 17 },
-			Package() { 0x000DFFFF, 2, 0, 18 },
-			Package() { 0x000DFFFF, 3, 0, 19 },
-
-			Package() { 0x000EFFFF, 0, 0, 16 },
-			Package() { 0x000EFFFF, 1, 0, 17 },
-			Package() { 0x000EFFFF, 2, 0, 18 },
-			Package() { 0x000EFFFF, 3, 0, 19 },
-
-			Package() { 0x000FFFFF, 0, 0, 16 },
-			Package() { 0x000FFFFF, 1, 0, 17 },
-			Package() { 0x000FFFFF, 2, 0, 18 },
-			Package() { 0x000FFFFF, 3, 0, 19 },
-
-			Package() { 0x0010FFFF, 0, 0, 16 },
-			Package() { 0x0010FFFF, 1, 0, 17 },
-			Package() { 0x0010FFFF, 2, 0, 18 },
-			Package() { 0x0010FFFF, 3, 0, 19 },
-
-			Package() { 0x0011FFFF, 0, 0, 16 },
-			Package() { 0x0011FFFF, 1, 0, 17 },
-			Package() { 0x0011FFFF, 2, 0, 18 },
-			Package() { 0x0011FFFF, 3, 0, 19 },
-
-			Package() { 0x0012FFFF, 0, 0, 16 },
-			Package() { 0x0012FFFF, 1, 0, 17 },
-			Package() { 0x0012FFFF, 2, 0, 18 },
-			Package() { 0x0012FFFF, 3, 0, 19 },
-
-			Package() { 0x0013FFFF, 0, 0, 16 },
-			Package() { 0x0013FFFF, 1, 0, 17 },
-			Package() { 0x0013FFFF, 2, 0, 18 },
-			Package() { 0x0013FFFF, 3, 0, 19 },
-
-			Package() { 0x0014FFFF, 0, 0, 16 },
-			Package() { 0x0014FFFF, 1, 0, 17 },
-			Package() { 0x0014FFFF, 2, 0, 18 },
-			Package() { 0x0014FFFF, 3, 0, 19 },
-
-			Package() { 0x0016FFFF, 0, 0, 16 },
-			Package() { 0x0016FFFF, 1, 0, 17 },
-			Package() { 0x0016FFFF, 2, 0, 18 },
-			Package() { 0x0016FFFF, 3, 0, 19 },
-
-			Package() { 0x0017FFFF, 0, 0, 16 },
-			Package() { 0x0017FFFF, 1, 0, 17 },
-			Package() { 0x0017FFFF, 2, 0, 18 },
-			Package() { 0x0017FFFF, 3, 0, 19 },
-
-			Package() { 0x0018FFFF, 0, 0, 16 },
-			Package() { 0x0018FFFF, 1, 0, 17 },
-			Package() { 0x0018FFFF, 2, 0, 18 },
-			Package() { 0x0018FFFF, 3, 0, 19 },
-
-			Package() { 0x0019FFFF, 0, 0, 16 },
-			Package() { 0x0019FFFF, 1, 0, 17 },
-			Package() { 0x0019FFFF, 2, 0, 18 },
-			Package() { 0x0019FFFF, 3, 0, 19 },
-
-			Package() { 0x001CFFFF, 0, 0, 16 },
-			Package() { 0x001CFFFF, 1, 0, 17 },
-			Package() { 0x001CFFFF, 2, 0, 18 },
-			Package() { 0x001CFFFF, 3, 0, 19 },
-
-			Package() { 0x001DFFFF, 0, 0, 16 },
-			Package() { 0x001DFFFF, 1, 0, 17 },
-			Package() { 0x001DFFFF, 2, 0, 18 },
-			Package() { 0x001DFFFF, 3, 0, 19 },
-
-			Package() { 0x001EFFFF, 0, 0, 16 },
-			Package() { 0x001EFFFF, 1, 0, 17 },
-			Package() { 0x001EFFFF, 2, 0, 18 },
-			Package() { 0x001EFFFF, 3, 0, 19 },
-
-			Package() { 0x001FFFFF, 0, 0, 16 },
-			Package() { 0x001FFFFF, 1, 0, 17 },
-			Package() { 0x001FFFFF, 2, 0, 18 },
-			Package() { 0x001FFFFF, 3, 0, 19 },
-		})
-
-		Device (UNC0)
-		{
-			Name (_HID, EisaId ("PNP0A03"))
-			Name (_UID, 0x3F)
-			Method (_BBN, 0, NotSerialized)
-			{
-				Return (0xff)
-			}
-
-			Name (_ADR, 0x00)
-			Method (_STA, 0, NotSerialized)
-			{
-				Return (0xf)
-			}
-
-			Name (_CRS, ResourceTemplate ()
-			{
-				WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
-					0x0000,             // Granularity
-					0x00FF,             // Range Minimum
-					0x00FF,             // Range Maximum
-					0x0000,             // Translation Offset
-					0x0001,             // Length
-					,, )
-			})
-
-			Method (_PRT, 0, NotSerialized)
-			{
-				If (LEqual (PICM, Zero))
-				{
-					Return (PRUN)
-				}
-
-				Return (ARUN)
-			}
-		}
-	}
-
-	#include "acpi/mainboard.asl"
-}
diff --git a/src/mainboard/intel/camelbackmountain_fsp/fadt.c b/src/mainboard/intel/camelbackmountain_fsp/fadt.c
deleted file mode 100644
index 5af6056b49..0000000000
--- a/src/mainboard/intel/camelbackmountain_fsp/fadt.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <soc/acpi.h>
-
-void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
-{
-	acpi_header_t *header = &(fadt->header);
-
-	acpi_fill_in_fadt(fadt, facs, dsdt);
-
-	/* Platform specific customizations go here */
-
-	header->checksum = acpi_checksum((void *) fadt, sizeof(acpi_fadt_t));
-}
diff --git a/src/mainboard/intel/camelbackmountain_fsp/irqroute.c b/src/mainboard/intel/camelbackmountain_fsp/irqroute.c
deleted file mode 100644
index f91cf0d5b3..0000000000
--- a/src/mainboard/intel/camelbackmountain_fsp/irqroute.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include "irqroute.h"
-
-DEFINE_IRQ_ROUTES;
diff --git a/src/mainboard/intel/camelbackmountain_fsp/irqroute.h b/src/mainboard/intel/camelbackmountain_fsp/irqroute.h
deleted file mode 100644
index c3911be75b..0000000000
--- a/src/mainboard/intel/camelbackmountain_fsp/irqroute.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Google Inc.
- * Copyright (C) 2015-2016 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef IRQROUTE_H
-#define IRQROUTE_H
-
-#include <soc/irq.h>
-#include <soc/pci_devs.h>
-
-#define PCI_DEV_PIRQ_ROUTES \
-	PCI_DEV_PIRQ_ROUTE(XHCI_DEV,  A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(ME_DEV,    A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(GBE_DEV,   A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(EHCI2_DEV, A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(HDA_DEV,   A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(PCIE_DEV,  A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(EHCI1_DEV, A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(SATA_DEV,  A, B, C, D)
-
-/*
- * Route each PIRQ[A-H] to a PIC IRQ[0-15]
- * Reserved: 0, 1, 2, 8, 13
- * ACPI/SCI: 9
- */
-#define PIRQ_PIC_ROUTES \
-	PIRQ_PIC(A,  5), \
-	PIRQ_PIC(B,  6), \
-	PIRQ_PIC(C,  7), \
-	PIRQ_PIC(D, 10), \
-	PIRQ_PIC(E, 11), \
-	PIRQ_PIC(F, 12), \
-	PIRQ_PIC(G, 14), \
-	PIRQ_PIC(H, 15)
-
-#endif /* IRQROUTE_H */
diff --git a/src/mainboard/intel/camelbackmountain_fsp/mainboard.c b/src/mainboard/intel/camelbackmountain_fsp/mainboard.c
deleted file mode 100644
index 29f98f46c0..0000000000
--- a/src/mainboard/intel/camelbackmountain_fsp/mainboard.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2011 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <types.h>
-#include <device/device.h>
-#include <device/pci_def.h>
-#if CONFIG(VGA_ROM_RUN)
-#include <x86emu/x86emu.h>
-#endif
-
-/*
- * mainboard_enable is executed as first thing after enumerate_buses().
- * This is the earliest point to add customization.
- */
-static void mainboard_enable(struct device *dev)
-{
-
-}
-
-struct chip_operations mainboard_ops = {
-	.enable_dev = mainboard_enable,
-};
diff --git a/src/mainboard/intel/camelbackmountain_fsp/romstage.c b/src/mainboard/intel/camelbackmountain_fsp/romstage.c
deleted file mode 100644
index cf52c01f04..0000000000
--- a/src/mainboard/intel/camelbackmountain_fsp/romstage.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google Inc.
- * Copyright (C) 2015 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <stddef.h>
-#include <soc/romstage.h>
-#include <drivers/intel/fsp1_0/fsp_util.h>
-
-/**
- * /brief mainboard call for setup that needs to be done before fsp init
- *
- */
-void early_mainboard_romstage_entry(void)
-{
-
-}
-
-/**
- * /brief mainboard call for setup that needs to be done after fsp init
- *
- */
-void late_mainboard_romstage_entry(void)
-{
-
-}
-
-/**
- * /brief customize fsp parameters here if needed
- */
-void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer)
-{
-
-}