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authorLee Leahy <leroy.p.leahy@intel.com>2016-02-14 15:10:35 -0800
committerLeroy P Leahy <leroy.p.leahy@intel.com>2016-02-18 20:36:32 +0100
commit535333dd54b0ef3fd29f26dc204db03065b4fedb (patch)
tree97cfb13ba1a7bfff619ad3ca7d549ae474f8ba47 /src/mainboard/intel
parentb457649ef6ab163d30d9d38521c10124b59bdddc (diff)
downloadcoreboot-535333dd54b0ef3fd29f26dc204db03065b4fedb.tar.xz
soc/intel/quark: Establish the Memory Map
Add ramstage.h to define some of the common header files used by the drivers in ramstage. Add northcluster.c, the driver for the memory controller, which defines the memory map. Testing on Galileo: * Edit the src/mainboard/intel/galileo/Makefile.inc file * Add "select ADD_FSP_PDAT_FILE" * Add "select ADD_FSP_RAW_BIN" * Add "select ADD_RMU_FILE" * Place the FSP.bin file in the location specified by CONFIG_FSP_FILE * Place the pdat.bin files in the location specified by CONFIG_FSP_PDAT_FILE * Place the rmu.bin file in the location specified by CONFIG_RMU_FILE * Testing successful if: * Memory map successfully displayed in BS_WRITE_TABLES state Change-Id: I8dc91119eaad0b7abc2e484d13ee708ba1253438 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/13721 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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