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authorRizwan Qureshi <rizwan.qureshi@intel.com>2015-12-08 17:38:23 +0530
committerPatrick Georgi <pgeorgi@google.com>2016-01-16 12:01:23 +0100
commit67ea2fb449fffa122e5144d3594ee0492d7285be (patch)
treefdf624450f2273f2e23d8ed9d5221d17b4fda2bc /src/mainboard/intel
parent2672ee3e3a021619edba8db7ebacdc9a34654c06 (diff)
downloadcoreboot-67ea2fb449fffa122e5144d3594ee0492d7285be.tar.xz
intel/kunimitsu: remove/disable Wake on lan
remove the WakeConfigWolEnableOverride to disable WOL override configuration in the General PM Configuration B (GEN_PMCON_B) register BRANCH=none BUG=none TEST=Build and booted in kunimitsu Change-Id: Ia523e7956c06c9f4a60e0a2296f771cc3c70bc25 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 12a07eebfb8fa4ee8013fbbb12283a0b429cacfd Original-Change-Id: I2be6c5b0114e4c7d8a7b9ceb59ee32f28f61769f Original-Reviewed-on: https://chromium-review.googlesource.com/316717 Original-Commit-Ready: Rizwan Qureshi <rizwan.qureshi@intel.com> Original-Tested-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12958 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/kunimitsu/devicetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb
index adb89317b8..16db1130bc 100644
--- a/src/mainboard/intel/kunimitsu/devicetree.cb
+++ b/src/mainboard/intel/kunimitsu/devicetree.cb
@@ -29,7 +29,6 @@ chip soc/intel/skylake
register "InternalGfx" = "1"
register "SkipExtGfxScan" = "1"
register "Device4Enable" = "1"
- register "WakeConfigWolEnableOverride" = "0x01"
# Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch
# SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s