summaryrefslogtreecommitdiff
path: root/src/mainboard/intel
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2019-12-19 23:22:21 +0100
committerNico Huber <nico.h@gmx.de>2019-12-31 18:57:16 +0000
commit6ad0ab1a693726c3fd5e9f68d1a8fc5b7535bd5e (patch)
tree1b38668bf0feeadfb64e13a7855e7821e1b1a4cc /src/mainboard/intel
parente3d9d67e9977ac5387eae057bc709b29ec6fe03f (diff)
downloadcoreboot-6ad0ab1a693726c3fd5e9f68d1a8fc5b7535bd5e.tar.xz
mb/**/acpi: Remove unused files
Remove commented-out entries in dsdt.asl, and then remove files that do not get built. Change-Id: I579e7ffbc2d6596fd7ffe6863ff3b3fb14b0ade6 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37857 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/baskingridge/dsdt.asl3
-rw-r--r--src/mainboard/intel/d945gclf/acpi/thermal.asl89
-rw-r--r--src/mainboard/intel/d945gclf/dsdt.asl6
-rw-r--r--src/mainboard/intel/emeraldlake2/acpi/ivybridge_pci_irqs.asl64
-rw-r--r--src/mainboard/intel/emeraldlake2/dsdt.asl3
-rw-r--r--src/mainboard/intel/harcuvar/dsdt.asl3
-rw-r--r--src/mainboard/intel/wtm2/dsdt.asl3
7 files changed, 0 insertions, 171 deletions
diff --git a/src/mainboard/intel/baskingridge/dsdt.asl b/src/mainboard/intel/baskingridge/dsdt.asl
index 34b14e2382..1fcb967381 100644
--- a/src/mainboard/intel/baskingridge/dsdt.asl
+++ b/src/mainboard/intel/baskingridge/dsdt.asl
@@ -31,9 +31,6 @@ DefinitionBlock(
// global NVS and variables
#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
- // General Purpose Events
- //#include "acpi/gpe.asl"
-
#include "acpi/thermal.asl"
#include <cpu/intel/common/acpi/cpu.asl>
diff --git a/src/mainboard/intel/d945gclf/acpi/thermal.asl b/src/mainboard/intel/d945gclf/acpi/thermal.asl
deleted file mode 100644
index 27337d49df..0000000000
--- a/src/mainboard/intel/d945gclf/acpi/thermal.asl
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-// Thermal Zone
-
-Scope (\_TZ)
-{
- ThermalZone (THRM)
- {
-
- // FIXME these could/should be read from the
- // GNVS area, so they can be controlled by
- // coreboot
- Name(TC1V, 0x04)
- Name(TC2V, 0x03)
- Name(TSPV, 0x64)
-
- // At which temperature should the OS start
- // active cooling?
- Method (_AC0, 0, Serialized)
- {
- Return (0xf5c) // Value for Rocky
- }
-
- // Method (_AC1, 0, Serialized)
- // {
- // Return (0xf5c)
- // }
-
- // Critical shutdown temperature
- Method (_CRT, 0, Serialized)
- {
- Return (Add (0x0aac, 0x50)) // FIXME
- }
-
- // CPU throttling start temperature
- Method (_PSV, 0, Serialized)
- {
- Return (0xaaf) // FIXME
- }
-
- // Get DTS Temperature
- Method (_TMP, 0, Serialized)
- {
- Return (0xaac) // FIXME
- }
-
- // Processors used for active cooling
- Method (_PSL, 0, Serialized)
- {
- If (MPEN) {
- Return (Package() {\_PR.CP01, \_PR.CP02})
- }
- Return (Package() {\_PR.CP01})
- }
-
- // TC1 value for passive cooling
- Method (_TC1, 0, Serialized)
- {
- Return (TC1V)
- }
-
- // TC2 value for passive cooling
- Method (_TC2, 0, Serialized)
- {
- Return (TC2V)
- }
-
- // Sampling period for passive cooling
- Method (_TSP, 0, Serialized)
- {
- Return (TSPV)
- }
-
-
- }
-}
diff --git a/src/mainboard/intel/d945gclf/dsdt.asl b/src/mainboard/intel/d945gclf/dsdt.asl
index be640c505e..b94f5bd460 100644
--- a/src/mainboard/intel/d945gclf/dsdt.asl
+++ b/src/mainboard/intel/d945gclf/dsdt.asl
@@ -29,15 +29,9 @@ DefinitionBlock(
#include <southbridge/intel/i82801gx/acpi/globalnvs.asl>
#include <southbridge/intel/common/acpi/platform.asl>
- // General Purpose Events
- //#include "acpi/gpe.asl"
-
// mainboard specific devices
#include "acpi/mainboard.asl"
- // Thermal Zone
- //#include "acpi/thermal.asl"
-
#include <cpu/intel/speedstep/acpi/cpu.asl>
Scope (\_SB) {
diff --git a/src/mainboard/intel/emeraldlake2/acpi/ivybridge_pci_irqs.asl b/src/mainboard/intel/emeraldlake2/acpi/ivybridge_pci_irqs.asl
deleted file mode 100644
index 3e841e03ab..0000000000
--- a/src/mainboard/intel/emeraldlake2/acpi/ivybridge_pci_irqs.asl
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* This is board specific information: IRQ routing for IvyBridge */
-
-// PCI Interrupt Routing
-Method(_PRT)
-{
- If (PICM) {
- Return (Package() {
- // Onboard graphics (IGD) 0:2.0
- Package() { 0x0002ffff, 0, 0, 16 },
- // High Definition Audio 0:1b.0
- Package() { 0x001bffff, 0, 0, 22 },
- // PCIe Root Ports 0:1c.x
- Package() { 0x001cffff, 0, 0, 17 },
- Package() { 0x001cffff, 1, 0, 18 },
- Package() { 0x001cffff, 2, 0, 19 },
- Package() { 0x001cffff, 3, 0, 20 },
- // EHCI #1 0:1d.0
- Package() { 0x001dffff, 0, 0, 19 },
- // EHCI #2 0:1a.0
- Package() { 0x001affff, 0, 0, 20 },
- // LPC devices 0:1f.0
- Package() { 0x001fffff, 0, 0, 21 },
- Package() { 0x001fffff, 1, 0, 22 },
- Package() { 0x001fffff, 2, 0, 23 },
- Package() { 0x001fffff, 3, 0, 16 },
- })
- } Else {
- Return (Package() {
- // Onboard graphics (IGD) 0:2.0
- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- // High Definition Audio 0:1b.0
- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
- // PCIe Root Ports 0:1c.x
- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },
- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKC, 0 },
- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKD, 0 },
- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKE, 0 },
- // EHCI #1 0:1d.0
- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
- // EHCI #2 0:1a.0
- Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKE, 0 },
- // LPC device 0:1f.0
- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKF, 0 },
- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKG, 0 },
- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKH, 0 },
- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },
- })
- }
-}
diff --git a/src/mainboard/intel/emeraldlake2/dsdt.asl b/src/mainboard/intel/emeraldlake2/dsdt.asl
index baf75b0473..c222888ede 100644
--- a/src/mainboard/intel/emeraldlake2/dsdt.asl
+++ b/src/mainboard/intel/emeraldlake2/dsdt.asl
@@ -34,9 +34,6 @@ DefinitionBlock(
// global NVS and variables
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
- // General Purpose Events
- //#include "acpi/gpe.asl"
-
#include <cpu/intel/common/acpi/cpu.asl>
Scope (\_SB) {
diff --git a/src/mainboard/intel/harcuvar/dsdt.asl b/src/mainboard/intel/harcuvar/dsdt.asl
index f970df936d..32d6e3d395 100644
--- a/src/mainboard/intel/harcuvar/dsdt.asl
+++ b/src/mainboard/intel/harcuvar/dsdt.asl
@@ -30,9 +30,6 @@ DefinitionBlock(
#include "acpi/platform.asl"
#include "acpi/mainboard.asl"
- // General Purpose Events
- //#include "acpi/gpe.asl"
-
// Thermal Handler
#include "acpi/thermal.asl"
diff --git a/src/mainboard/intel/wtm2/dsdt.asl b/src/mainboard/intel/wtm2/dsdt.asl
index 6bfc172848..7b676f41a4 100644
--- a/src/mainboard/intel/wtm2/dsdt.asl
+++ b/src/mainboard/intel/wtm2/dsdt.asl
@@ -33,9 +33,6 @@ DefinitionBlock(
// global NVS and variables
#include <soc/intel/broadwell/acpi/globalnvs.asl>
- // General Purpose Events
- //#include "acpi/gpe.asl"
-
// CPU
#include <cpu/intel/common/acpi/cpu.asl>