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authorArthur Heymans <arthur@aheymans.xyz>2018-01-16 14:19:37 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-02-27 09:46:29 +0000
commitd2d2aef6a3222af909183fb96dc7bc908fac3cd4 (patch)
treeff01f96984d46138bf3ab0bb253f04024d9fb0e1 /src/mainboard/intel
parent5fd1d5ad1258407ade7fe8f72672c878bdfd8f05 (diff)
downloadcoreboot-d2d2aef6a3222af909183fb96dc7bc908fac3cd4.tar.xz
sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location
Many generations of Intel hardware have identical code concerning the RCBA. Change-Id: I33ec6801b115c0d64de1d2a0dc5d439186f3580a Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23287 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/dcp847ske/early_southbridge.c2
-rw-r--r--src/mainboard/intel/emeraldlake2/romstage.c1
2 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c
index f33415741f..873718fb12 100644
--- a/src/mainboard/intel/dcp847ske/early_southbridge.c
+++ b/src/mainboard/intel/dcp847ske/early_southbridge.c
@@ -23,7 +23,7 @@
#include <arch/acpi.h>
#include <console/console.h>
#include "northbridge/intel/sandybridge/raminit_native.h"
-
+#include <southbridge/intel/common/rcba.h>
#include "superio.h"
#include "thermal.h"
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index 3271d630c9..24c4b564c2 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -31,6 +31,7 @@
#include <northbridge/intel/sandybridge/raminit.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
+#include <southbridge/intel/common/rcba.h>
#include <southbridge/intel/common/gpio.h>
#include <arch/cpu.h>
#include <cpu/x86/msr.h>