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authorAaron Durbin <adurbin@chromium.org>2013-03-29 14:36:10 -0500
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-03-29 21:11:27 +0100
commitdc82fc563486794005ada364f498167df9b686d6 (patch)
tree95729f7d0cf0878d2526649a7b2ac48109ec0679 /src/mainboard/intel
parentb5146b394a11642649d7645be97ad5c5f8e2892e (diff)
downloadcoreboot-dc82fc563486794005ada364f498167df9b686d6.tar.xz
wtm2: auto-select CACHE_ROM
The WTM2 board has a fairly static configuration. As such it's been tested to properly handle CACHE_ROM given the number of MTRRs the boards' CPUs supports. Change-Id: Ic67cd1eebce580003dc6b6655cac2b2a92dd1b5f Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2964 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/wtm2/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/intel/wtm2/Kconfig b/src/mainboard/intel/wtm2/Kconfig
index 8942591995..16b5373fb4 100644
--- a/src/mainboard/intel/wtm2/Kconfig
+++ b/src/mainboard/intel/wtm2/Kconfig
@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_SMI_HANDLER
select CHROMEOS
select EXTERNAL_MRC_BLOB
+ select CACHE_ROM
config MAINBOARD_DIR
string