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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-13 23:00:41 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-13 23:00:41 +0000 |
| commit | 212d0a2eaefac97c55ad932e775be68a975fe164 (patch) | |
| tree | 6cd83b660f21ace2a3c9a3c9be4b1024dba19bfd /src/mainboard/intel | |
| parent | 6529c2a7172f166f53ec3d6204dd375cd6441579 (diff) | |
| download | coreboot-212d0a2eaefac97c55ad932e775be68a975fe164.tar.xz | |
Remove various .c #includes from Intel i810/i82801ax/i82801bx boards.
This is pretty much the same mechanism as in r5929.
- Use 'romstage-y' to turn i82801ax_early_smbus.c and i82801bx_early_smbus.c
into distinct compilation units, and don't #include the files anymore
in romstage.c files.
- Ditto for northbridge/intel/i82810/raminit.c, and
northbridge/intel/i82810/debug.c.
- Add various header files which are now needed, drop unused includes.
- Make functions that need to be visible non-static.
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5951 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/d810e2cb/romstage.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/src/mainboard/intel/d810e2cb/romstage.c b/src/mainboard/intel/d810e2cb/romstage.c index 94f1170534..fcdbb3156e 100644 --- a/src/mainboard/intel/d810e2cb/romstage.c +++ b/src/mainboard/intel/d810e2cb/romstage.c @@ -23,24 +23,21 @@ #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> -#include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> #include "southbridge/intel/i82801bx/i82801bx.h" -#include "southbridge/intel/i82801bx/i82801bx_early_smbus.c" #include "northbridge/intel/i82810/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" -#include "lib/delay.c" #include "cpu/x86/bist.h" #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" #include "gpio.c" -#include "northbridge/intel/i82810/raminit.c" -/* #include "northbridge/intel/i82810/debug.c" */ #include <lib.h> #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + void main(unsigned long bist) { /* Set southbridge and Super I/O GPIOs. */ @@ -52,7 +49,7 @@ void main(unsigned long bist) report_bist_failure(bist); enable_smbus(); - /* dump_spd_registers(); */ + dump_spd_registers(); sdram_set_registers(); sdram_set_spd_registers(); sdram_enable(); |