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authorUwe Hermann <uwe@hermann-uwe.de>2010-12-07 19:16:07 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-12-07 19:16:07 +0000
commit4028ce7b768c9b33e4b0b1af20eede9968359071 (patch)
treef01d319ad08b5611b2bdf95c7f426d5f993635d3 /src/mainboard/intel
parent7f20d73eba22babbc5bf9efd8df8a3e9d3a117c7 (diff)
downloadcoreboot-4028ce7b768c9b33e4b0b1af20eede9968359071.tar.xz
Get rid of some unneeded function prototypes in romstage.c files.
Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6147 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/d810e2cb/romstage.c3
-rw-r--r--src/mainboard/intel/d945gclf/romstage.c2
2 files changed, 0 insertions, 5 deletions
diff --git a/src/mainboard/intel/d810e2cb/romstage.c b/src/mainboard/intel/d810e2cb/romstage.c
index fcdbb3156e..81e2d5d348 100644
--- a/src/mainboard/intel/d810e2cb/romstage.c
+++ b/src/mainboard/intel/d810e2cb/romstage.c
@@ -35,9 +35,6 @@
#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
void main(unsigned long bist)
{
/* Set southbridge and Super I/O GPIOs. */
diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c
index 8b79f2dc57..8b02163ab8 100644
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
@@ -39,8 +39,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
-void enable_smbus(void);
-
void setup_ich7_gpios(void)
{
/* TODO: This is highly board specific and should be moved */