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authorStefan Reinauer <reinauer@chromium.org>2013-02-12 14:17:15 -0800
committerRonald G. Minnich <rminnich@gmail.com>2013-02-14 02:00:10 +0100
commit4aff4458f58398f54c248604694c7005294c1747 (patch)
treeeb3d9259255abc486a4d6d9eb53199b4d408053e /src/mainboard/intel
parentdc8259ce1d2e866f3133da49c1d6f4773f5698c1 (diff)
downloadcoreboot-4aff4458f58398f54c248604694c7005294c1747.tar.xz
sconfig: rename pci_domain -> domain
The name pci_domain was a bit misleading, since the construct is only PCI specific in a particular (northbridge/cpu) implementation, but not by concept. As implementations and hardware change, be more generic about our naming. This will allow us to support non-PCI systems without adding new keywords. Change-Id: Ide885a1d5e15d37560c79b936a39252150560e85 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2376 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/d810e2cb/devicetree.cb2
-rw-r--r--src/mainboard/intel/d945gclf/devicetree.cb2
-rw-r--r--src/mainboard/intel/eagleheights/devicetree.cb2
-rw-r--r--src/mainboard/intel/emeraldlake2/devicetree.cb2
-rw-r--r--src/mainboard/intel/jarrell/devicetree.cb2
-rw-r--r--src/mainboard/intel/mtarvon/devicetree.cb2
-rw-r--r--src/mainboard/intel/truxton/devicetree.cb2
-rw-r--r--src/mainboard/intel/xe7501devkit/devicetree.cb4
8 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/intel/d810e2cb/devicetree.cb b/src/mainboard/intel/d810e2cb/devicetree.cb
index 412933632d..f5afa92717 100644
--- a/src/mainboard/intel/d810e2cb/devicetree.cb
+++ b/src/mainboard/intel/d810e2cb/devicetree.cb
@@ -24,7 +24,7 @@ chip northbridge/intel/i82810 # Northbridge
device lapic 0 on end # APIC
end
end
- device pci_domain 0 on # PCI domain
+ device domain 0 on # PCI domain
device pci 0.0 on end # Graphics Memory Controller Hub (GMCH)
device pci 1.0 on end # Chipset Graphics Controller (CGC)
chip southbridge/intel/i82801bx # Southbridge
diff --git a/src/mainboard/intel/d945gclf/devicetree.cb b/src/mainboard/intel/d945gclf/devicetree.cb
index a58d99e61e..6a4b353e99 100644
--- a/src/mainboard/intel/d945gclf/devicetree.cb
+++ b/src/mainboard/intel/d945gclf/devicetree.cb
@@ -25,7 +25,7 @@ chip northbridge/intel/i945
end
end
- device pci_domain 0 on
+ device domain 0 on
subsystemid 0x8086 0x464c inherit
device pci 00.0 on end # host bridge
device pci 01.0 off end # i945 PCIe root port
diff --git a/src/mainboard/intel/eagleheights/devicetree.cb b/src/mainboard/intel/eagleheights/devicetree.cb
index 9971264169..5a272c15d5 100644
--- a/src/mainboard/intel/eagleheights/devicetree.cb
+++ b/src/mainboard/intel/eagleheights/devicetree.cb
@@ -1,5 +1,5 @@
chip northbridge/intel/i3100
- device pci_domain 0 on
+ device domain 0 on
device pci 00.0 on end # IMCH
device pci 00.1 on end # IMCH error status
device pci 01.0 on end # IMCH EDMA engine
diff --git a/src/mainboard/intel/emeraldlake2/devicetree.cb b/src/mainboard/intel/emeraldlake2/devicetree.cb
index 686fe2e347..1d0ed42d3c 100644
--- a/src/mainboard/intel/emeraldlake2/devicetree.cb
+++ b/src/mainboard/intel/emeraldlake2/devicetree.cb
@@ -27,7 +27,7 @@ chip northbridge/intel/sandybridge
end
end
- device pci_domain 0 on
+ device domain 0 on
device pci 00.0 on end # host bridge
device pci 02.0 on end # vga controller
diff --git a/src/mainboard/intel/jarrell/devicetree.cb b/src/mainboard/intel/jarrell/devicetree.cb
index fb32a089e3..b5c3ece796 100644
--- a/src/mainboard/intel/jarrell/devicetree.cb
+++ b/src/mainboard/intel/jarrell/devicetree.cb
@@ -1,5 +1,5 @@
chip northbridge/intel/e7520
- device pci_domain 0 on
+ device domain 0 on
subsystemid 0x8086 0x1079 inherit
device pci 00.0 on end
device pci 00.1 on end
diff --git a/src/mainboard/intel/mtarvon/devicetree.cb b/src/mainboard/intel/mtarvon/devicetree.cb
index cd7df2d1d2..61ead86ee7 100644
--- a/src/mainboard/intel/mtarvon/devicetree.cb
+++ b/src/mainboard/intel/mtarvon/devicetree.cb
@@ -1,5 +1,5 @@
chip northbridge/intel/i3100
- device pci_domain 0 on
+ device domain 0 on
subsystemid 0x8086 0x2680 inherit
device pci 00.0 on end # IMCH
device pci 00.1 on end # IMCH error status
diff --git a/src/mainboard/intel/truxton/devicetree.cb b/src/mainboard/intel/truxton/devicetree.cb
index 486601a420..23e98d3582 100644
--- a/src/mainboard/intel/truxton/devicetree.cb
+++ b/src/mainboard/intel/truxton/devicetree.cb
@@ -1,5 +1,5 @@
chip northbridge/intel/i3100
- device pci_domain 0 on
+ device domain 0 on
subsystemid 0x8086 0x2680 inherit
device pci 00.0 on end # IMCH
device pci 00.1 on end # IMCH error status
diff --git a/src/mainboard/intel/xe7501devkit/devicetree.cb b/src/mainboard/intel/xe7501devkit/devicetree.cb
index 18ee64e0db..75d918e3c8 100644
--- a/src/mainboard/intel/xe7501devkit/devicetree.cb
+++ b/src/mainboard/intel/xe7501devkit/devicetree.cb
@@ -1,5 +1,5 @@
chip northbridge/intel/e7501
- device pci_domain 0 on
+ device domain 0 on
subsystemid 0x8086 0x2480 inherit
device pci 0.0 on end # Chipset host controller
device pci 0.1 on end # Host RASUM controller
@@ -61,7 +61,7 @@ chip northbridge/intel/e7501
device pci 1f.5 off end # AC97 Audio
device pci 1f.6 off end # AC97 Modem
end # SB
- end # PCI_DOMAIN
+ end # PCI domain
device lapic_cluster 0 on
chip cpu/intel/socket_mPGA604
device lapic 0 on end