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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2019-03-24 14:57:49 +0100 |
|---|---|---|
| committer | Patrick Rudolph <siro@das-labor.org> | 2019-04-13 14:49:01 +0000 |
| commit | 0168639b9af184097dcfd913a29f970eaaa8a47e (patch) | |
| tree | ed5327e44cf19c4f0eeedf054f660873c4984e29 /src/mainboard/intel | |
| parent | 1ae592b468d7b40d8c7f50d4fcb4dd515aeeaf74 (diff) | |
| download | coreboot-0168639b9af184097dcfd913a29f970eaaa8a47e.tar.xz | |
sb/intel/i82801jx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB
Use common code to detect ACPI S3.
Untested.
Change-Id: I2264c087b317f70506817b5458295a17e83b1efc
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32038
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/dg43gt/romstage.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/intel/dg43gt/romstage.c b/src/mainboard/intel/dg43gt/romstage.c index 4e474263ae..c7ef09d8db 100644 --- a/src/mainboard/intel/dg43gt/romstage.c +++ b/src/mainboard/intel/dg43gt/romstage.c @@ -18,6 +18,7 @@ #include <console/console.h> #include <southbridge/intel/i82801jx/i82801jx.h> #include <southbridge/intel/common/gpio.h> +#include <southbridge/intel/common/pmclib.h> #include <northbridge/intel/x4x/x4x.h> #include <cpu/x86/bist.h> #include <cpu/intel/romstage.h> |