diff options
author | Uwe Hermann <uwe@hermann-uwe.de> | 2009-11-06 17:11:05 +0000 |
---|---|---|
committer | Myles Watson <mylesgw@gmail.com> | 2009-11-06 17:11:05 +0000 |
commit | d63085b20ef40caae1c60a7532b5243e1e30b109 (patch) | |
tree | c732b7666d8082775022592eeddedff81375eeef /src/mainboard/intel | |
parent | eeec0ef00a6be64d6846599fe7cf81ead22e2f02 (diff) | |
download | coreboot-d63085b20ef40caae1c60a7532b5243e1e30b109.tar.xz |
Drop all pre-CBFS rom_address entries in Config.lb/devicetree.cb.
Since we have CBFS setting rom_address in board files is no longer
necessary.
Also, drop vga_rom_address from RS690 completely, it was never used
in the code.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r-- | src/mainboard/intel/d945gclf/Config.lb | 3 | ||||
-rw-r--r-- | src/mainboard/intel/d945gclf/devicetree.cb | 3 |
2 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/intel/d945gclf/Config.lb b/src/mainboard/intel/d945gclf/Config.lb index 7e59a47810..d9eee75168 100644 --- a/src/mainboard/intel/d945gclf/Config.lb +++ b/src/mainboard/intel/d945gclf/Config.lb @@ -152,9 +152,6 @@ chip northbridge/intel/i945 device pci 01.0 off end # i945 PCIe root port chip drivers/pci/onboard device pci 02.0 on end # vga controller - # register "rom_address" = "0xfffc0000" # 256 KB image - # register "rom_address" = "0xfff80000" # 512 KB image - # register "rom_address" = "0xfff00000" # 1 MB image end device pci 02.1 on end # display controller diff --git a/src/mainboard/intel/d945gclf/devicetree.cb b/src/mainboard/intel/d945gclf/devicetree.cb index ea84556ea3..eeab074f56 100644 --- a/src/mainboard/intel/d945gclf/devicetree.cb +++ b/src/mainboard/intel/d945gclf/devicetree.cb @@ -30,9 +30,6 @@ chip northbridge/intel/i945 device pci 01.0 off end # i945 PCIe root port chip drivers/pci/onboard device pci 02.0 on end # vga controller - # register "rom_address" = "0xfffc0000" # 256 KB image - # register "rom_address" = "0xfff80000" # 512 KB image - # register "rom_address" = "0xfff00000" # 1 MB image end device pci 02.1 on end # display controller |