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| author | Werner Zeh <werner.zeh@siemens.com> | 2020-07-07 09:21:43 +0200 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2020-07-09 14:03:07 +0000 |
| commit | 2cb3cc52380818c8301a7cd6f9a1295147d01186 (patch) | |
| tree | 5fd3ec0124265914e4807d659538a0124176678a /src/mainboard/intel | |
| parent | 93084103d940c02d64a729cf5fd14c3347781c88 (diff) | |
| download | coreboot-2cb3cc52380818c8301a7cd6f9a1295147d01186.tar.xz | |
mb/siemens/mc_apl1: Use OPCODE menu set up of fast SPI driver
The common fast SPI driver has a function to set up the SPI OPCODE menu.
Use this function here instead of coding it again as it results in the
very same register values being written.
TEST=Compare register values in both cases and make sure they match.
Change-Id: I98457a0b0652f746734ee4204e10acd09b6e5fda
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43166
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: <uwe.poeche@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
0 files changed, 0 insertions, 0 deletions