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authorMaxim Polyakov <max.senia.poliak@gmail.com>2020-07-26 13:12:49 +0300
committerPatrick Georgi <pgeorgi@google.com>2020-08-03 05:23:42 +0000
commita9713c11c07590eb0ba6afd7bd341f349b695d12 (patch)
tree46b3159ded0e75613541f0f463eefa3095edd4d7 /src/mainboard/intel
parentc8b7215639bcb5f3812bc33fe93b537ede15bad0 (diff)
downloadcoreboot-a9713c11c07590eb0ba6afd7bd341f349b695d12.tar.xz
mb/intel/cedarisland: Remove duplicated code
Some UPD options are already set in `xeon_sp/cpx/romstage.c`. Remove them from the board configuration to avoid duplicating this code. Change-Id: Ic79245103c33427e06c7ea881be778e3d219c45f Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43924 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/cedarisland_crb/romstage.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/intel/cedarisland_crb/romstage.c b/src/mainboard/intel/cedarisland_crb/romstage.c
index 8468605484..03e28a1678 100644
--- a/src/mainboard/intel/cedarisland_crb/romstage.c
+++ b/src/mainboard/intel/cedarisland_crb/romstage.c
@@ -6,9 +6,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
{
FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
- m_cfg->BoardId = 0x1d;
- m_cfg->BoardTypeBitmask = 0x11111111;
- m_cfg->DebugPrintLevel = 8;
m_cfg->KtiLinkSpeedMode = 0;
- m_cfg->KtiPrefetchEn = 2;
}