diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2010-03-28 21:26:54 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-03-28 21:26:54 +0000 |
| commit | 35b6bbb7217956fe29f5d7f29d3ce780f1e640f5 (patch) | |
| tree | df9e6309e10de7887d8346c8e1fd2dcc2b1f3e2e /src/mainboard/intel | |
| parent | 83a1dd850b9f61929a2db17a9429d3d193e34bfb (diff) | |
| download | coreboot-35b6bbb7217956fe29f5d7f29d3ce780f1e640f5.tar.xz | |
drop unneeded __ROMCC__ checks when the check for __PRE_RAM__ is more
appropriate. Also, factor out post_code() for __PRE_RAM__ code and drop it from
some mainboards.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5307 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/eagleheights/reset.c | 16 | ||||
| -rw-r--r-- | src/mainboard/intel/jarrell/reset.c | 31 |
2 files changed, 9 insertions, 38 deletions
diff --git a/src/mainboard/intel/eagleheights/reset.c b/src/mainboard/intel/eagleheights/reset.c index 1388bcf6b4..006c746dbb 100644 --- a/src/mainboard/intel/eagleheights/reset.c +++ b/src/mainboard/intel/eagleheights/reset.c @@ -21,20 +21,8 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} +#if defined (__PRE_RAM__) +#include <arch/romcc_io.h> #endif void soft_reset(void) diff --git a/src/mainboard/intel/jarrell/reset.c b/src/mainboard/intel/jarrell/reset.c index 3b79e439e2..fb379bd372 100644 --- a/src/mainboard/intel/jarrell/reset.c +++ b/src/mainboard/intel/jarrell/reset.c @@ -1,42 +1,25 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} -#endif +#include <arch/romcc_io.h> void soft_reset(void) { outb(0x04, 0xcf9); } + void hard_reset(void) { outb(0x02, 0xcf9); outb(0x06, 0xcf9); } + void full_reset(void) { - device_t dev; /* Enable power on after power fail... */ - dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801ER_LPC), 0); - if (dev != PCI_DEV_INVALID) { - unsigned byte; - byte = pci_read_config8(dev, 0xa4); - byte &= 0xfe; - pci_write_config8(dev, 0xa4, byte); - - } + unsigned byte; + byte = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4); + byte &= 0xfe; + pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, byte); outb(0x0e, 0xcf9); } |