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authorNico Huber <nico.h@gmx.de>2019-05-04 17:17:40 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-05-07 15:57:51 +0000
commitec562161cd2265c924482835fd2ab32c13ba587e (patch)
treec62582361b3b4537da22d96fbf608eaae1f21c38 /src/mainboard/intel
parentf98f8ebb8cb43f17c8d244f2c4cce2e257355e37 (diff)
downloadcoreboot-ec562161cd2265c924482835fd2ab32c13ba587e.tar.xz
soc/intel/bsw: Move memory init values into `romstage.h`
`chip.h` is usually used as devicetree interface. Change-Id: Ied30927d68927b86758a84ccf3f5fbd8cce632f1 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32592 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/strago/romstage.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/intel/strago/romstage.c b/src/mainboard/intel/strago/romstage.c
index 0f3067ea81..ba0ff7b85e 100644
--- a/src/mainboard/intel/strago/romstage.c
+++ b/src/mainboard/intel/strago/romstage.c
@@ -17,7 +17,6 @@
#include <soc/gpio.h>
#include <soc/pci_devs.h>
#include <soc/romstage.h>
-#include <chip.h>
#include "onboard.h"
#include <boardid.h>