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authorSubrata Banik <subrata.banik@intel.com>2018-05-17 15:57:43 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-06-06 06:17:09 +0000
commitf513cebd8b966c15e3c8abcd2d0f540607ea5964 (patch)
treed1a24c10038bd8471bc339eaf4ea818d0fa1241d /src/mainboard/intel
parent19cd07f2a015b419e55ee998ea67fd2e1ff7b2ff (diff)
downloadcoreboot-f513cebd8b966c15e3c8abcd2d0f540607ea5964.tar.xz
soc/intel/{cannonlake, skylake}: Select Gen-6 PCH binding for SKL/CNL
This patch creates a glue layer between SOC and common block IPs in terms of PCH. All common IP blocks now can be selected based on SOC_INTEL_COMMON_PCH_BASE config option. BUG=none BRANCH=b:78109109 TEST=Build and boot Cannonlake RVP and EVE. Change-Id: I4e1f009489f2d8338ae94b78d7e9eb3f88a85d99 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/26349 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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